reg_dbgcfg1

Module Instance	Base Address	Register Address
`iohmc_ctrl_inst_0_iohmc_ctrl_mmr_top_inst`	`0xF8010000`	`0xF8010004`

Size: 32

Offset: 0x4

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`cfg_dbg_ctrl` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`cfg_dbg_ctrl` `RW 0x0`

reg_dbgcfg1 Fields

Bit	Name	Description	Access	Reset
31:0	`cfg_dbg_ctrl`	iohmc_ctrl_mmr_top_inst.cfg_dbg_ctrl[31:0] Name:Debug Control Description:TBD	`RW`	`0x0`