gmacgrp_gmii_data

         <b> Register 5 (GMII Data Register) </b>

The GMII Data register stores Write data to be written to the PHY register located at the address specified in Register 4 (GMII Address Register). This register also stores the Read data from the PHY register located at the address specified by Register 4.

Note: This register is present for all PHY interface when you select the Station Management (MDIO) feature in coreConsultant.

Module Instance	Base Address	Register Address
`i_emac_emac0`	`0xFF800000`	`0xFF800014`
`i_emac_emac1`	`0xFF802000`	`0xFF802014`
`i_emac_emac2`	`0xFF804000`	`0xFF804014`

Size: 32

Offset: 0x14

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`reserved_31_16` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`gd` `RW 0x0`

gmacgrp_gmii_data Fields

Bit	Name	Description	Access	Reset
31:16	`reserved_31_16`	Reserved	`RO`	`0x0`
15:0	`gd`	GMII Data This field contains the 16-bit data value read from the PHY or RevMII after a Management Read operation or the 16-bit data value to be written to the PHY or RevMII before a Management Write operation.	`RW`	`0x0`

Bit

Name

Description

Access

Reset

31:16

reserved_31_16

Reserved

RO

0x0

15:0

gd

GMII Data

This field contains the 16-bit data value read from the PHY or RevMII after a Management Read operation or the 16-bit data value to be written to the PHY or RevMII before a Management Write operation.

RW

0x0