CAIUTCR
CAIU Transaction Control Register
Module Instance | Base Address | Register Address |
---|---|---|
CCU_fpga10 | 0xF7001000 | 0xF7001000 |
Size: 32
Offset: 0x0
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
rsvd1 RO 0x0 |
|||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
rsvd1 RO 0x0 |
IsolEn RW 0x0 |
TransEn RW 0x1 |
CAIUTCR Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
31:2 | rsvd1 |
Reserved (RAZ/WI) |
RO | 0x0 |
1 | IsolEn |
Agent Isolation Enable |
RW | 0x0 |
0 | TransEn |
Agent Transaction Enable |
RW | 0x1 |