intrstk
Interrupt Pending Status without considering the interrupt masks.
Set by hardware and read by software.
Hardware can set the particular bit, even if the corresponding bit is masked by software by intrmsk register.
Sticky behavior. Once set by hardware, the bit will remain set, till cleared by software by writing to intrclr register.
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_clk_mgr_clkmgr | 0xFFD10000 | 0xFFD1001C |
Size: 32
Offset: 0x1C
Access: RO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
Reserved |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
Reserved |
perlocklost 0x0 |
mainlocklost 0x0 |
perlockachieved 0x0 |
mainlockachieved 0x0 |
|||||||||||
intrstk Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 3 | perlocklost |
Pending status for periph PLL lock lost interrupt before intr mask |
RO | 0x0 |
| 2 | mainlocklost |
Pending status for main PLL lock lost interrupt before intr mask |
RO | 0x0 |
| 1 | perlockachieved |
Pending status for periph PLL lock achieved interrupt before intr mask |
RO | 0x0 |
| 0 | mainlockachieved |
Pending status for main PLL lock achieved interrupt before intr mask |
RO | 0x0 |