device_reset 

         Device reset. Controller sends a RESET command to device. 
                         Controller resets bit after sending command to device
Module Instance Base Address Register Address
sdm_i_nand_config 0xFFA10000 0xFFA10000

Size: 32

Offset: 0x0

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

bank3

RW 0x0

bank2

RW 0x0

bank1

RW 0x0

bank0

RW 0x0

device_reset Fields

Bit Name Description Access Reset
3 bank3 
 Issues reset to bank 3. Controller resets the bit after
                                      reset command is issued to device.
RW 0x0
2 bank2 
 Issues reset to bank 2. Controller resets the bit after
                                      reset command is issued to device.
RW 0x0
1 bank1 
 Issues reset to bank 1. Controller resets the bit after
                                      reset command is issued to device.
RW 0x0
0 bank0 
 Issues reset to bank 0. Controller resets the bit after
                                      reset command is issued to device.
RW 0x0