IC_COMP_PARAM_1
Name: Component Parameter Register 1
Size: 32 bits
Address Offset: 0xf4
Read/Write Access: Read
Note
This is a constant read-only register that contains
encoded information about the component's parameter settings.
The reset value depends on coreConsultant parameter(s).
| Module Instance | Base Address | Register Address |
|---|---|---|
| sdm_i_i2c_0_DW_apb_i2c_addr_block1 | 0xFF8D0100 | 0xFF8D01F4 |
| sdm_i_i2c_1_DW_apb_i2c_addr_block1 | 0xFF8D0200 | 0xFF8D02F4 |
Size: 32
Offset: 0xF4
Access: RO
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
RSVD_IC_COMP_PARAM_1 RO 0x0 |
TX_BUFFER_DEPTH RO 0x3F |
||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
RX_BUFFER_DEPTH RO 0x3F |
ADD_ENCODED_PARAMS RO 0x1 |
HAS_DMA RO 0x1 |
INTR_IO RO 0x1 |
HC_COUNT_VALUES RO 0x0 |
MAX_SPEED_MODE RO 0x2 |
APB_DATA_WIDTH RO 0x2 |
|||||||||
IC_COMP_PARAM_1 Fields
| Bit | Name | Description | Access | Reset | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31:24 | RSVD_IC_COMP_PARAM_1 |
Reserved bits - Read Only |
RO | 0x0 | ||||||||
| 23:16 | TX_BUFFER_DEPTH |
The value of this register is derived from the IC_TX_BUFFER_DEPTH coreConsultant parameter. 0x00 = Reserved 0x01 = 2 0x02 = 3 to 0xFF = 256 |
RO | 0x3F | ||||||||
| 15:8 | RX_BUFFER_DEPTH |
The value of this register is
derived from the IC_RX_BUFFER_DEPTH coreConsultant
parameter.
0x00: Reserved
0x01: 2
0x02: 3
to
0xFF: 256
|
RO | 0x3F | ||||||||
| 7 | ADD_ENCODED_PARAMS |
The value of this register is derived from the IC_ADD_ENCODED_PARAMS coreConsultant parameter. Reading 1 in this bit means that the capability of reading these encoded parameters via software has been included. Otherwise, the entire register is 0 regardless of the setting of any other parameters that are encoded in the bits. 0: False 1: True
|
RO | 0x1 | ||||||||
| 6 | HAS_DMA |
The value of this register is derived from the IC_HAS_DMA coreConsultant parameter 0: False 1: True
|
RO | 0x1 | ||||||||
| 5 | INTR_IO |
The value of this register is derived from the IC_INTR_IO coreConsultant parameter 0: Individual 1: Combined
|
RO | 0x1 | ||||||||
| 4 | HC_COUNT_VALUES |
The value of this register is derived from the IC_HC_COUNT VALUES coreConsultant parameter 0: False 1: True
|
RO | 0x0 | ||||||||
| 3:2 | MAX_SPEED_MODE |
The value of this register is derived from the IC_MAX_SPEED_MODE coreConsultant parameter. 0x0: Reserved 0x1: Standard 0x2: Fast 0x3: High Dependencies: This field is not applicable when IC_ULTRA_FAST_MODE=1
|
RO | 0x2 | ||||||||
| 1:0 | APB_DATA_WIDTH |
The value of this register is derived from the APB_DATA_WIDTH coreConsultant parameter. 0x0: 8 bits 0x1: 16 bits 0x2: 32 bits 0x3: Reserved
|
RO | 0x2 |