noc_fw_l4_sys_scr Summary

L4_SYS Security Control Registers (SCR)

Base Address: 0xFFD21100

Register Address Offset	Bit Fields
`noc_fw_l4_sys_l4_sys_scr`
`dma_ecc` `0x8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`emac0rx_ecc` `0xC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`emac0tx_ecc` `0x10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`emac1rx_ecc` `0x14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`emac1tx_ecc` `0x18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`emac2rx_ecc` `0x1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`emac2tx_ecc` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`nand_ecc` `0x2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`nand_read_ecc` `0x30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`nand_write_ecc` `0x34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`ocram_ecc` `0x38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`sdmmc_ecc` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`usb0_ecc` `0x44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`usb1_ecc` `0x48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`clock_manager` `0x4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`io_manager` `0x54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`reset_manager` `0x58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`system_manager` `0x5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`osc0_timer` `0x60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu` `RW 0x0`
`osc1_timer` `0x64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu` `RW 0x0`
`watchdog0` `0x68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu` `RW 0x0`
`watchdog1` `0x6C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu` `RW 0x0`
`watchdog2` `0x70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu` `RW 0x0`
`watchdog3` `0x74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`dma` `RW 0x0`	`Reserved`							`mpu` `RW 0x0`
`dap` `0x78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`						`etr` `RW 0x0`	`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`l4_noc_probes` `0x90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`
`l4_noc_qos` `0x94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`axi_ap` `RW 0x0`	`Reserved`							`fpga2soc` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`mpu` `RW 0x0`