pin18sel 

         HPS Pinmux Select for IO18
Module Instance Base Address Register Address
i_dedio_pinmux_csr 0xFFD13000 0xFFD13048

Size: 32

Offset: 0x48

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

val

RW 0x8

pin18sel Fields

Bit Name Description Access Reset
3:0 val 
Select value determines which interface has been selected for IO18. It also detemines the output_enable for the respective interface. Its value can range from 0 to 9.
0000 (0) -- Pin connected to emac0.rxd0
0001 (1) -- Pin connected to usb1.data2
0010 (2) -- Pin connected to trace.d4
0011 (3) -- Pin connected to nand.adq10
0100 (4) -- NA
0101 (5) -- NA
0110 (6) -- NA
0111 (7) -- NA
1000 (8) -- Pin connected to gpio0.io18
1001 (9) -- Pin connected to cm.hps_osc_clk
 RW 0x8