ARIES Embedded provides design services and standard products for the market of industrial electronics since 2001. With focus on FPGA technology and open source software, ARIES Embedded helps leveraging newest technology of embedded systems into real products. The customers of ARIES Embedded benefit by reducing development-risks and -costs, improving time-to-market and increasing competitiveness. The offered modular systems can easily be used for functional prototypes, pilot series and even mass production. Many specific design are build as a customization of a proven standard-product. The company is headquartered in Furstenfeldbruck, Munich area, Germany.
Offerings
Offering
MX10 is a non-volatile and fully programmable SoM solution based on the MAX®10 family by Intel® PSG. It incorporates advantages of Intel® MAX® 10 FPGA such as instant-on functionality, integrated analog-to-digital converters (ADCs) and dual configuration flash.MX10 can be used with the standard baseboard (Spider Base) as a complete building block or can be plugged into existing designs and products as functional part. It connects to its baseboard via a 230pins MXM2 connector and provides the ideal solution support for various soft-core CPUs, video-processing algorithms, etc. The module delivers full-featured FPGA capabilities including support for various soft-core CPUs, advanced DSP and video-processing algorithms as well as external DDR3 controller. USB Firmware for MX10 and SpiderSoMMX10 and Spider SoM modules provide a USB device interface implemented with PIC16F1454 microcontroller (MCU). On the SoM side the MCU is connected to three interfaces: serial (if the other side is implemented inside the FPGA), I2C bus (connected to the module PMIC, charge controller, RTC and FPGA), and FPGA JTAG programming interface. On the host side Linux is supported as operating system, currently Ubuntu16.04LTS is marked as a reference base. Features; MAX 10 FPGA in F256 package module supports wide range of the devices: from 10M04DC to 10M50DA, optional 4 MByte SPI NOR, optional 4 GByte e.MMC, optional 128/256/512MByte DDR3 DRAM (for 10M 16/25/40/50 FPGAs) programmable clock generator and PLL, with optional external reference input178 FPGA GPIO pins, including 13 LVDS transmitters and 54 receivers RTC with battery backup programmable high-efficient PMIC, FPGA IO voltages are configurable, optional Li-Ion/Li-Pol charger Size: 70mm x 35mm.
Offering
The MAXEVK was developed to serve the MAX System on Modul, based on Arria® 10 SoC-FPGA devices. It offers most interfaces of the HPS Subsystem and all FPGA I/O pins on to a 1,27mm pin header. 24 transceive channels are available at two samtec high-speed connectors. The HPS supports two Gigabit Ethernet interfaces, one USB OTG interface as well as a UART/USB converter. For in-system-programming a USB-Blaster II is implemented. Features:2 x Gigabit Ethernet USB-OTGUART / USB converter embedded USB-Blaster II5 x pin header for FPGA / HPS signals2 x high-speed connectors for 24 transceiver12V power supply clock generation for Ethernet / USB wall plug power supply size: 180 x 180mm.
Offering
The SpiderSoM is a programmable, non-volatile solution based on Intel® MAX® 10 FPGA, which enables it to deliver full-featured FPGA capabilities. Being a low cost platform the SpiderSoM can be used with the standard baseboard (spider base) as a complete building block or can be plugged into existing designs and products as functional part. It connects to its baseboard via a 230pins MXM2 connector and provides the ideal solution support for various soft-core CPUs, video-processing algorithms, etc. USB firmware for MX10 and SpiderSoMMX10 and Spider SoM modules provide a USB device interface implemented with PIC16F1454 microcontroller (MCU). On the SoM side the MCU is connected to three interfaces: serial (if the other side is implemented inside the FPGA), I2C bus (connected to the module PMIC, charge controller, RTC and FPGA), and FPGA JTAG programming interface. On the host side Linux is supported as operating system, currently Ubuntu16.04LTS is marked as a reference base. Features: MAX® 10 single voltage supply FPGA in U169 package module supports MAX® 10 FPGAs from 10M02SC to 10M16SA, optional 4 MiB SPI NOR, optional 4 GiB e.MMC, optional 8 MiB SDRAMFPGA GPIO pins, optional RTC with battery backup, optional Li-Ion/Li-Pol charger size: 70mm x 35mmOS. Support: FreeRTOSTM.
Offering
The MCVEVP supports a quick start-up of SoC-FPGA projects and can easily be used as a fast-prototype platform. MCV offers the full flexibility of the Altera® ,Cyclone® V SoC FPGA family. It integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. The Altera® SoCs combine the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic. Features:2x HPS Gigabit Ethernet HPS USB2x UART2x CANTFT connector touchscreen controller I²CHSMC extension connector3x PMOD extension connectors microSD-card slot.
Offering
MCV offers the full flexibility of the Altera Cyclone V SoC FPGA family. It integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. The Altera SoCs combine the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic. MCV features additional hard logic such as PCI Express Gen1, multiport memory controllers, and high-speed serial transceivers. Our SoCs drive down power and cost while enabling performance levels required by cost-sensitive applications. Due to the flexibility of the MCV concept 25KLE, 40KLE, 85KLE and 110KLE SoC FPGAs are supported by MCV. Features: Altera Cyclone V SoC FPGA without PCIe supportA2: 5CSEBA2U23C8N25KLE, 36 DSP blocksA4: 5CSEBA4U23C7N, available on request40KLE, 58 DSP blocksA5: 5CSEBA5U23C7N, available on request85KLE, 87 DSP blocksA6: 5CSEBA6U23C7N110KLE, 112 DSP blocks with PCIe supportC2: 5CSXFC2C6U23C7N25KLE, 36 DSP blocks, 6 transceivers 2.5Gbit/sC4: 5CSXFC4C6U23C7N, available on request40KLE, 58 DSP blocks, 6 transceivers 2.5Gbit/sC5: 5CSXFC5C6U23C7N, available on request85KLE, 87 DSP blocks, 6 transceivers 2.5Gbit/sC6: 5CSXFC6C6U23C7N110KLE, 112 DSP blocks, 6 transceivers 2.5Gbit/s. Dual 800 MHz Cortex A9 CoresHPS-Peripherals1 GByte DDR3 RAM256 Mbit configuration device4GByte eMMC memory143 FPGA signals66 HPS signals. Clock distribution default configuration: Gigabit Ethernet UARTCANSPII²CUSB single 3,3V supply size 74mmx42mm2 x Samtec QSH-090-01-F-D-A board-to-board interconnect.
Offering
The MCXL SoM leverages the functionality of the Cyclone® 10 LP family on a compact embedded module. Intel® Cyclone® 10 LP FPGAs are ideal for cost-sensitive applications that require increasing lower static power as the need for scalable processing acceleration increases system interface requirements. Typical end market examples include: I/O expansion interfacing bridging sensor fusion Industrial motor control. Features: Cyclone® 10LP10CL016YU484C7N, 10CL055YU484C7N,10CL040YU484C7N256 Mbit QSPI, Flash 512 Mbit SDRAM, 32bitor 2x128MBit hyper RAM and 2x512MBit hype flash clock generation4 sser LEDs Gigabit Ethernet Phy221 FPGA. Pins:6 Pins IO-Bank 1 (3.3V)41;Pins IO-Bank 818; Pins IO-Bank 3 (3.3V)39; Pins IO-Bank 439; Pins IO-Bank 537; Pins IO-Bank 641;Pins IO-Bank 7JTAG pin headeron board 2.5V, and 1.2V power supply size : 37 x 90 mm.
Offering
The Intel®c10 SoCs integrate an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. It combines the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic. The Intel® Arria®10 SoCs, based on TSMC’s 20 nm process technology, combine a dual-core ARM Cortex-A9 MPCore HPS with industry-leading programmable logic technology that includes hardened floating-point digital signal processing (DSP) blocks.Features:Arria 10 Soc FPGA10AS066660KLE, 1688 DSP Blöcke, 47Mbit RAM24 Transceiver10AS048480KLE, 1368 DSP Blöcke, 32MBit RAM24 Transceiver Dual Cortex A9 Cores (up to 1.5GHz)HPS-Peripherals3 x 10/100/1000 EMAC with integrated DMA2x USB OTG with integrated DMA2x UART 16550 compatible4x SPI5x I2C1x SIO, DIO, QIO SPI flash supported1x eMMC 4.5 with DMA and CE-ATA support two DDR3 Memory bank with 1,2 or 4 Gbyte RAM1 Gbit configuration device eMMC (4...64Gbyte)24 transceiver channel232 FPGA I/O pins52 HPS I/O pins two User LEDs12V power supply size: 60x110mm.
Offering
MCVS offers the full flexibility of the Altera® Cyclone® V SoC FPGA family. It integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. The Altera® SoCs combine the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic. MCVS features additional hard logic such as PCI Express® Gen1, multiport memory controllers, and high-speed serial transceivers. Our SoCs drive down power and cost while enabling performance levels required by cost-sensitive applications. Due to the flexibility of the MCV concept 25KLE, 40KLE, 85KLE and 110KLE SoC FPGAs are supported by MCVS. Being compliant to the SMARC2.0 standard defines the key differentiator for MCVS compared to MCV. Main advantages for customers are lower product price as well exchangeability and scalability. Features: Altera® Cyclone® V SoC FPGA without PCIe supportA2: 5CSEBA2U23C8N25KLE, 36 DSP blocksA4: 5CSEBA4U23C7N40KLE, 58 DSP blocksA5: 5CSEBA5U23C7N85KLE, 87 DSP blocksA6: 5CSEBA6U23C7N110KLE, 112 DSP blocks with PCIe supportC2: 5CSXFC2C6U23C7N25KLE, 36 DSP blocks, 6 transceivers 2.5Gbit/sC4: 5CSXFC4C6U23C7N40KLE, 58 DSP blocks, 6 transceivers 2.5Gbit/sC5: 5CSXFC5C6U23C7N85KLE, 87 DSP blocks, 6 transceivers 2.5Gbit/sC6: 5CSXFC6C6U23C7N110KLE, 112 DSP blocks, 6 transceivers 2.5Gbit/s Dual 800 MHz Cortex A9 CoresHPS-Peripherals1 GByte DDR3 RAM256 Mbit configuration device4GByte eMMC memory143 FPGA signals66 HPS signals Clock distribution default configuration: Gigabit EthernetUARTCANSPII²CUSBSMARC2.0 compliant.
Offering
The SpiderBase is a unique baseboard, designed to host the SpiderSoM / MX10 SoM based on Intel® PSG (former Altera®) MAX® 10 FPGAs. The SpiderSoM can be used with the standard baseboard (spiderbase) as a complete building block or can be plugged into existing designs and products as functional part. It connects to its baseboard via a 230pins MXM2 connector and provides the ideal solution support for various soft-core CPUs, video-processing algorithms, etc. Features: simple baseboard in 2 layer design compatibility to the SpiderSoM as well as the MAX® 10 SoM. Open hardwareMxM2 pcb edge connector every pin of the MxM2 connector module is accessible at one of the pinheaders large 25x15 .1” prototyping area4 PMOD compatible headers (3.3V or 5V supply voltage selectable)2 user push buttons reset and power buttons2 user LEDs. Arduino shield compatible interface Intel® PSG blaster compatible programming interfaces USB mini B connectorCR2032 cell holderJST-2.0 lithium battery connector configuration jumpers (e.g. boot selection for MAX® 10 module)
Offering
The MCXLEVK can be used for first evaluations of the MCXL Cyclone® 10 Module. It provides the power supply and JTAG Connection, as well as all IO Signals. The IO signals are connected to 2.54mm pin header. Additionally eight user LEDs and buttons are available, which can be connected to IO signals using Jumper. The base board can be supplied from 7 to 36V and provides the 3.3V power supply for the module. I/O voltages are connected to 3.3V via a zero-ohm resistor. For different I/O voltages the resistor can be resoldered and the voltage can be supplied via the pin header. Features: power supply JTAG Header Service Header for I2C programming SPI EEPROM8 user LEDs8 user buttons size : 110 x 123 mm.