DLIN - LIN with UART half-duplex enhanced functionality – Basic and Safety-Enhanced
About this offer
DCD believes that even though something may be small or slow, it can still offer maximal efficiency and ultimate reliability. That’s why our DLIN controller with UART half-duplex enhanced functionality supports transmission speeds between 1kb/s and 20kb/s, which allows us to transmit and receive LIN messages compatible to:LIN 1.3,LIN 2.1and the newest LIN 2.2ADLIN bridge to APB, AHB, and AXI bus, it is a softcore of the local interconnect Network (LIN). This interface is a serial communication protocol, primarily designed to be used in automotive applications. Compared to the CAN, The LIN is slower, but thanks to its simplicity, it is much more cost-effective. Our core is ideal for communication in intelligent sensors and actuators, where the bandwidth and versatility of the CAN is not required. The DLIN core provides an interface between a microprocessor/microcontroller and a LIN bus. It can work as a master or slave LIN node, depending on a work mode determined by the microprocessor/microcontroller. DCD’s controller supports transmission speeds between 1 and 20kb/s, which allows it to transmit and receive LIN messages compatible with LIN 1.3., LIN 2.1, and the newest 2.2A specification. The reported information status includes the type and condition of transfer operations performed by the DLIN, as well as a wide range of LIN error conditions (overrun, framing, parity, timeout). Our core includes a programmable timer that allows for detecting timeout and synchronization errors. The DLIN is described at the RTL level, empowering the target use in FPGA and ASIC technologies. The IP core is available in two versions: basic and safety-enhanced. This sophisticated solution’s been developed as ISO26262-10 safety element out of context. It can optionally be improved by necessary safety mechanisms and provide detailed safety documentation: all ISO26262 soft IP SEooC required work products, which include complete Failure Modes Effects and Detection Analysis FMEDA analysis with step-by-step instruction to help to integrate the IP into the customer’s system and to conduct the system-level safety analysis. All the safety-related work products were checked by a third-party, independent audit. The conducted safety analysis depicts, that the safety metrics are fulfilled and both IPs reach the Automotive Safety Integrity Level ASIL-B (Single Point Fault Metric SPFM > 90%, Latent Fault Metric LFM > 60%). DCD-SEMI delivers a complete FMEDA analysis with step-by-step instructions to help to integrate the IP into the customer’s system and to conduct the system-level safety analysis. This ASIL-B ready design may easily be used in Automotive Safety Systems at the ASIL-B level, but DCD-SEMI may optionally deliver higher ASIL level ready IP. For further information and the optional features please contact our support.
Details
Regional Coverage
Americas:
Latin America Region:
Panama
Nicaragua
Belize
Antigua and Barbuda
Cayman Islands
Bermuda
El Salvador
St. Vincent
Sint Maarten
Haiti
Suriname
St. Kitts and Nevis
Chile
Guadeloupe
Dominican Republic
Turks and Caicos
St. Lucia
Bahamas
Mexico
Guatemala
Curacao
Jamaica
Grenada
Uruguay
Falkland Islands
Peru
Brazil
Antarctica
Dominica
Aruba
Venezuela
Argentina
Honduras
Trinidad and Tobago
French Guiana
St. Barthelemy
Ecuador
Colombia
Guyana
Costa Rica
Paraguay
Martinique
Bolivia
St. Martin
Montserrat
Barbados
Anguilla
North America Region:
US Virgin Islands
Guam
Bonaire
US Minor Outlying Islands
American Samoa
British Virgin Islands
United States
Canada
Puerto Rico
Asia, Pacific, and Japan:
Southeast Asia:
Singapore
Brunei
Indonesia
Myanmar
Philippines
Malaysia
Vietnam
Timor-Leste
Thailand
Australia and New Zealand:
Heard Island and McDonald Islands
Australia
New Zealand
Japan:
Japan
Taiwan:
Taiwan
Rest of Asia:
French Polynesia
Samoa
Nepal
Christmas Island
Northern Mariana Islands
Kiribati
Vanuatu
Mongolia
Palau
Niue
Norfolk Island
Laos
Tuvalu
Cook Islands
South Georgia and the South Sandwich Islands
Nauru
Pitcairn
Tokelau
New Caledonia
Papua New Guinea
Tonga
Solomon Islands
Marshall Islands
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Micronesia
Cocos Islands
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Korea:
South Korea
South Asia:
Bhutan
India
Sri Lanka
Maldives
Bangladesh
Pakistan
Europe, Middle East, and Africa:
Middle East, Turkey, and Africa:
Madagascar
Congo (the Democratic Republic of the)
Qatar
Togo
Kuwait
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State of Palestine
Morocco
Saudi Arabia
Bahrain
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Burundi
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Gabon
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Libya
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Cote d'Ivoire
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South Africa
Eritrea
Western Sahara
Mayotte
Oman
Congo
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Reunion
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Sao Tome and Principe
Kenya
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Djibouti
Jordan
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Turkey
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Lesotho
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Nigeria
Botswana
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Senegal
Seychelles
Yemen
Central African Republic
Niger
Gambia
Somalia
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Central Eastern Europe:
Slovakia
Macedonia
Slovenia
Bulgaria
Romania
Montenegro
Croatia
Serbia
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Czechia
Latvia
Estonia
Albania
Poland
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Western European Union Region:
Luxembourg
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Commonwealth of Independent States:
Georgia
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Northern European Union Region:
Svalbard and Jan Mayen
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Southern European Union Region:
Greece
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Malta
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Spain
Central European Region:
Germany
Austria
People's Republic of China:
People's Republic of China:
Macao
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Mainland China
Use Case
Robot
Smart Home
Smart City
Others
Industry
Automotive
Technical Specifications
- Category:
- Software and IP Cores: FPGA Intellectual Property Cores: Processors and Peripherals: Peripherals
- End Customer Type:
-
Enterprise
Consumer
Small and Medium sized Business
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Digital Core Design is a leading Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house. The company was founded in 1999 and thanks to in-depth specialization and innovative approach we have introduced more than 70 different architectures. Among them you can find e.g. World’s Fastest 8051 CPU, World’s Smallest 8051 CPU, silicon proven and royalty-free 32-bit CPU, Automotive LIN, CAN, CAN-FD, CAN-XL controllers
Dlin - Lin With Uart Half-duplex Enhanced Functionality – Basic And Safety-enhanced
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