WiMedia 1.5 LDPC Encoder/Decoder
About this offer
The solution from Creonic for data rates of up to 1 Gbit/s offers outstanding efficiency in terms of implementation complexity. Area and energy efficiency played a decisive role during the LDPC code design process. With this unified approach not only outstanding efficiency is obtained, but also excellent error correction performance, outperforming viterbi decoders by up to 3 dB. At the same time, a throughput of hundreds of Mbit/s can be achieved even on low-cost FPGAs.
Technical Specifications
- Category:
- Software and IP Cores: FPGA Intellectual Property Cores: DSP: Error Detection and Correction
- Operating Systems:
-
OS Independent OS Independent family
OS Independent OS Independent family OS Independent
- End Customer Type:
-
Enterprise
Included Intel Technology
Intel® Stratix® 10 FPGAs and SoC FPGAs
Intel® Arria® 10 FPGAs and SoC FPGAs
Intel Agilex® 7 FPGAs and SoC FPGAs
Stratix® V FPGAs
Stratix® IV FPGAs
CREONIC GMBH
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CREONIC GMBH
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Creonic is an ISO 9001:2015 certified provider of ready-for-use IP cores for wired, wireless, fiber, and free-space optical communications. All relevant digital signal processing algorithms are covered, including, but not limited to, forward error correction, modulation, equalization, and demodulation. We offer the richest product portfolio in this field, covering standards like 3GPP 5G, DVB-S2X, DVB-RCS2, CCSDS, and Wifi. The products are applicable for ASIC and FPGA technologies and comply with the highest requirements with respect to quality and performance. As the richest in this field, the IP core product portfolio is used by dozens of customers worldwide in satellite modems and satellites. With Creonic’s chip designs, companies from start-ups to global corporations can realize their NewSpace goals. For more information please visit our website at www.creonic.com
Wimedia 1.5 Ldpc Encoder/decoder
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