DQSPI - Serial Peripheral Interface Master/Slave with single, dual and quad SPI Bus support
About this offer
The DQSPI is a revolutionary quad SPI designed to offer the fastest available operations for any serial SPI memory. It is flexible enough to interface directly with numerous standard product peripherals from several manufacturers. Moreover, IP Core supports all 8, 16, 32 bit processors available on the market. The DQSPI is a fully configurable SPI master/slave device, which allows user to configure polarity and phase of serial clock signal SCK. It lets the microcontroller to communicate with fast serial SPI memories and serial peripheral devices. Moreover, it's capable of interprocessor communications in a multi-master system.
Technical Specifications
- Category:
- Software and IP Cores: FPGA Intellectual Property Cores: Processors and Peripherals: Peripherals
- End Customer Type:
-
Enterprise
Resources
Included Intel Technology
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Cyclone® III FPGAs
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Intel® Cyclone® 10 FPGAs
Stratix® II FPGAs
Cyclone® V FPGAs and SoC FPGAs
Cyclone® II FPGAs
Intel® Stratix® 10 FPGAs and SoC FPGAs
Arria® V FPGAs and SoC FPGAs
Stratix® III FPGAs
Intel® Arria® 10 FPGAs and SoC FPGAs
Stratix® IV FPGAs
DIGITAL CORE DESIGN
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DIGITAL CORE DESIGN
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Digital Core Design is a leading Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house. The company was founded in 1999 and thanks to in-depth specialization and innovative approach we have introduced more than 70 different architectures. Among them you can find e.g. World’s Fastest 8051 CPU, World’s Smallest 8051 CPU, silicon proven and royalty-free 32-bit CPU, Automotive LIN, CAN, CAN-FD, CAN-XL controllers
Dqspi - Serial Peripheral Interface Master/slave With Single, Dual And Quad Spi Bus Support
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