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XIP1213B: MACSEC AES256-GCM IP core targeting 1Gbps+ links

About this offer

XIP1213B from Xiphera is a balanced Intellectual Property (IP) core implementing the MACsec protocol as standardized in IEEE Std 802.1AE-2018. The MACsec protocol defines a security infrastrucure for Layer 2 (as per the OSI model) traffic by assuring that a received frame has been sent by a transmitting station that claimed to send it. Furthermore, the traffic between stations is both encrypted to provide data confidentiality and authenticated to provide data integrity.XIP1213B uses Advanced Encryption Standard with 256 bits long key in Galois Counter Mode (AES-GCM) to protect data confidentiality, data integrity and data origin authentication. The cipher suite is denoted either as GCM-AES-XPN-256 if the eXtended Packet Numbering (XPN) is in use, or as GCM-AES-XPN-256 if XPN is not in use. Both GCM-AES-256 and GCM-AES-XPN-256 use Xiphera's IP core XIP1113B as the underlying building block for AES-GCM.XIP1213B is best suited for traffic on 1 Gbps links, and can be deployed using low-cost FPGA families. XIP1213B can also in selected cases be retrofitted to existing FPGA designs without requiring a board re-spin, either if there are enough FPGA resources available or if a pin-compatible FPGA with additional resources can be used. Key management (including key exchange) lies outside the scope of 802.1AE, and hence the functionality of XIP1213B is based on the assumption that key management is performed by externally to XIP1213B.Moderate resource requirements: The entire XIP1213B requires 9907 Adaptive Lookup Modules (ALMs) (Intel® Cyclone® 10 GX), and does not require any multipliers or DSPBlocks in a typical FPGA implementation. Performance: XIP1213B achieves a throughput in the Gbps range, for example 1.96+ Gbps in Intel® Cyclone® 10 GX. Standard Compliance: XIP1213B is fully compliant with the MACsec protocol as standardized in IEEE Std 802.1AE-2018. The cipher suite (GCM-AES-256 or GCM-AES-XPN-256) is fully compliant with the Advanced Encryption Algorithm (AES) standard FIPS-197, as well as with the Galois Counter Mode (GCM) standard SP 800-38D.Test Vector Compliance: XIP1213B passes the relevant test vectors specified in Annex C of IEEE Std 802.1AE-2018.32-bit FIFO Interfaces ease the integration of XIP1213B with other FPGA logic and/or control software.

Technical Specifications

Category:
Software and IP Cores: FPGA Intellectual Property Cores: Interface Protocols: Communications
End Customer Type:

Small and Medium sized Business

Enterprise

Resources

XIP1213B: MACSEC AES256-GCM Product brief
Published On: Oct 17, 2024
XIP1213B: MACSEC AES256-GCM Product page
Published On: Oct 17, 2024

Included Intel Technology

Cyclone® V FPGAs and SoC FPGAs
Cyclone® V SE SoC FPGA
Cyclone® V ST SoC FPGA
Cyclone® V GT FPGA
Cyclone® V SX SoC FPGA
Cyclone® V E FPGA
Cyclone® V GX FPGA
Arria® V FPGAs and SoC FPGAs
Arria® V GZ FPGA
Arria® V ST SoC FPGA
Arria® V SX SoC FPGA
Arria® V GT FPGA
Arria® V GX FPGA
Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Arria® 10 GT FPGA
Intel® Arria® 10 GX FPGA
Intel® Arria® 10 SX SoC FPGA
Intel Agilex® 7 FPGAs and SoC FPGAs
Intel Agilex® 7 FPGAs and SoC FPGAs F-Series
Intel® Cyclone® 10 FPGAs
Intel® Cyclone® 10 GX FPGA
Intel® Stratix® 10 FPGAs and SoC FPGAs
Intel® Stratix® 10 DX FPGA
Intel® Stratix® 10 MX FPGA
Intel® Stratix® 10 AX SoC FPGA
Intel® Stratix® 10 GX FPGA
Intel® Stratix® 10 NX FPGA
Intel® Stratix® 10 SX SoC FPGA
Intel® Stratix® 10 TX FPGA
Stratix® V FPGAs
Stratix® V GX FPGA
Stratix® V GS FPGA
Stratix® V GT FPGA
Stratix® V E FPGA

Details

Regional Coverage

Americas :

Latin America Region

North America Region


Asia, Pacific, and Japan :

Australia and New Zealand

Japan

Korea

Rest of Asia

South Asia

Southeast Asia

Taiwan


Europe, Middle East, and Africa :

Central Eastern Europe

Central European Region

Commonwealth of Independent States

Middle East, Turkey, and Africa

Northern European Union Region

Southern European Union Region

Western European Union Region


People's Republic of China :

People's Republic of China


Use Case

Energy Monitoring

Factory Automation

High Performance Computing


Cloud Computing :

Hybrid Cloud

Private Cloud

Private Cloud and Software Defined Infrastructure

Public Cloud


Industry

Defense and Space

Finance and Insurance

Government


Automotive :

Autonomous Driving


Communications :

Data Processing, Hosting and Related Services

Telecommunications


Energy and Utilities :

Electric Power


Manufacturing :

Industrial Automation


Xiphera Ltd

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Xiphera Ltd

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Xiphera Ltd

Xiphera Ltd is a Finnish company designing hardware-based security solutions using standardized cryptographic algorithms. We have strong cryptographic expertise, extensive experience in system design, and deep knowledge on reprogrammable logic, enabling us to protect our customers’ critical information and assets. Xiphera's product portfolio consists of secure and efficient cryptographic intellectual property cores, which enable the design of an embedded system meeting the cybersecurity requirements for confidentiality, integrity, authenticity, and non-repudiability. Xiphera's design philosophy targets a direct implementation of the cryptographic algorithms in hardware, and therefore the cryptographic IP cores have been designed for Field Programmable Gate Arrays (FPGAs) as the target technology.Xiphera's products and solutions have wide applicability in different end markets, where the customers' threat models and performance requirements vary considerably. With a high-reliability portfolio and extensive expertise, Xiphera’s value proposition is to offer peace of mind in a dangerous world.

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Xip1213b: Macsec Aes256-gcm Ip Core Targeting 1gbps+ Links

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