At Architecture Day 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making on its six pillars of technology innovation: process and packaging, architecture, memory, interconnects, security and software. Intel is taking full advantage of its unique position to deliver a mix of scalar, vector, matrix and spatial architectures deployed in CPUs, GPUs, accelerators and FPGAs – unified by oneAPI, an industry-standard open programming model to simplify application development.
Intel revealed its 10nm SuperFin technology, representing the largest single intranode enhancement in the company’s history and delivering performance improvement comparable to a full-node transition. Intel also unveiled architectural details of its Willow Cove microarchitecture and the Tiger Lake system-on-chip architecture for mobile client and provided first looks at its fully scalable Xe graphics architectures. Together with Intel’s disaggregated design approach and coupled with advanced packaging technology, XPU offerings and software-centric strategy, the company is focused on developing leading products across its portfolio to customers.
Raja Koduri Editorial: Intel Delivers Advances Across 6 Pillars of Technology, Powering Our Leadership Product Roadmap
Event Fact Sheet: Intel Unpacks Architectural Innovations and Reveals New Transistor Technology
Presentation: Intel Architecture Day 2020 Presentation Slides
More Resources: Six Pillars of Technology Innovation for the Next Era of Computing
Event Video Replay
Watch video: “Architecture Day 2020 (Event Replay)”
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Topics:
6 Technology Pillars Overview, Process and Packaging Update
Tiger Lake, Willow Cove, CPU Roadmap
GPU Roadmap, Xe LP Architecture and Software
FPGAs, Memory, Interconnect
Security, AI Software, oneAPI
Data center, Client, Intel Labs
Images
10nm SuperFin technology combines Intel's enhanced FinFET transistors with a Super MIM capacitor and an improved interconnect metal stack to deliver performance improvements comparable to a full-node transition, representing the largest single, intranode enhancement in Intel’s history. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)
10nm SuperFin technology combines Intel's enhanced FinFET transistors with a Super MIM capacitor and an improved interconnect metal stack to deliver performance improvements comparable to a full-node transition, representing the largest single, intranode enhancement in Intel’s history. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)
10nm SuperFin technology combines Intel's enhanced FinFET transistors with a Super MIM capacitor and an improved interconnect metal stack to deliver performance improvements comparable to a full-node transition, representing the largest single, intranode enhancement in Intel’s history. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)
10nm SuperFin technology delivers a process performance boost that makes it the largest single, intranode enhancement in Intel's history, essentially the same level of performance achieved over multiple steps at 14nm and nearly the equivalent performance of a full-node transition. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)
10nm SuperFin technology combines an enhanced FinFET transistor, improved interconnect metal stack and new Super MIM capacitor to achieve a performance boost that makes it the largest single intranode enhancement in Intel's history. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)
The Tiger Lake mobile client architecture, built using Intel 10nm SuperFin technology, achieves a greater than generational performance increase in both its CPU and graphics and adds a number of new features -- all while increasing power efficiency. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)
The Tiger Lake mobile client architecture, built using Intel 10nm SuperFin technology, includes Willow Cove CPU cores, the first ever Xe architecture graphics, new AI capabilities, rich input/output and more. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)
Intel's advanced packaging roadmap is built on decades of research and development, leading to new innovations in multiple dimensions and enabling new chip designs with lower cost, greater flexibility and quicker time to market. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)
Intel's CPU core roadmap now includes a new Alder Lake performance hybrid architecture that will combine Golden Cove and Gracemont cores in one highly efficient product arriving in 2021. At Architecture Day in August 2020, Intel Chief Architect Raja Koduri, Intel fellows and architects provided details on the progress Intel is making. (Credit: Intel Corporation)