Introduction
Summary of changes for version 20230628
Available Downloads
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- Size: 1.9 MB
- SHA256: 86876A745E3D224DCFD222ED3DE465B47559E85811DF2DB9820EF09A9DFF5CCE
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- SHA256: 06021C71E9E4DC314DAC7D9026EFC23D525FF1350A5107C9C51EAC2FCEB3B3BA
- Unix*
- Size: 1.9 MB
- SHA256: 2E5A86923506BB19AB5A6ECF1AFA9ABAF04EF90AFE76E05271A6EC25D058106A
- Microsoft Windows*
- Size: 3 MB
- SHA256: ABA7479424FAE698C54F20695B7A9A47BC06AA1B9FC8EFEABC2B0D05B51FE7CD
- Microsoft Windows*
- Size: 3.3 MB
- SHA256: 8ECFC2FA67D2216640F33DD9D18AC2643C9CC8C48B17536145C7BDA93F4CCDBE
- Microsoft Windows*
- Size: 1.3 MB
- SHA256: 8011AA38B49A277466BE70317BCA1C8FBF1551DC44EF856A99BF1C9FAAD1DBB2
Detailed Description
June 2023. Summary of changes for version 20230628:
This release is available at https://acpica.org/downloads
0) Global changes:
Update all copyright notices to the year 2023. This effects all source modules, as well as utility signons.
Add OS-specific support for Zephyr RTOS.
Fix miscellaneous code that accesses various objects.
Remove some dead code.
Add C “Flexible Array” support.
Add support for 64 bit LoongArch compilation.
Add first batch of RISC-V related definitions.
Performed a global automated update to remove tabs, fix indentation issues, etc.
1) ACPICA kernel-resident subsystem:
hwvalid: Drop port I/O validation.
2) ACPICA tools and utilities:
iASL: Added full macro support in the preprocessor. Example:
#define ABCD(a,b,c,d) a+b+c-d
Known macro support limitations (at this time):
No support for multi-line #define macros (backslash continuation lines)
No support for the C-style ternary operator
No support for the stringizing operator (#)
No support for the concatenation (token pasting) operator (##)
No support for variable number of macro arguments
Add support for AMD Secure Processor Table (ASPT) version 1.
Add support for Arm's MPAM ACPI table version 2.
ACPI 6.5: MADT: add support for trace buffer extension in GICC.
Headers: Delete bogus NodeArray array of pointers from AEST table.
PHAT table support is still ongoing.
Disclaimers1
Product and Performance Information
Intel is in the process of removing non-inclusive language from our current documentation, user interfaces, and code. Please note that retroactive changes are not always possible, and some non-inclusive language may remain in older documentation, user interfaces, and code.