Visible to Intel only — GUID: jir1725868690849
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1. About the Nios® V Processor Lockstep
2. Overview
3. Controlling the Nios® V Processor Lockstep
4. Programming Model
5. Signals, Interfaces, and Build Parameters
6. Using Nios® V Processor Lock Step
A. Document Revision History for the Nios® V Processor: Lockstep Implementation User Guide
B. Appendix
4.4.1. CPUs’ Reset Control Register - DCLSM_CPURC
4.4.2. DCLSM Basic Control Register - DCLSM_CTRL
4.4.3. DCLSM Blind Window Control Register - DCLSM_BWCR
4.4.4. All Alarms’ Prior Alarms’ Fault Injection Register - ERRCTRL_ALL_ALARMS_PRIOR_AFI
4.4.5. INTREQ Configuration Register - ERRCTRL_INTREQ_CONF
4.4.6. Timeout Deadline and Status Register - ERRCTRL_TIMEOUT
4.4.7. Timeout Acknowledgment Register - ERRCTRL_TIMEOUT_ACK
4.4.8. Enable Key fRSmartComp Control Register - ERRCTRL_ENABLE_KEY
4.4.9. Root Fault Injection Control register - ERRCTRL_ROOT_INJ
4.4.10. Alarm Fault Injection Control register - ERRCTRL_ALARM_INJ
4.4.11. Event Mask Configuration register - ERRCTRL_MASKA and ERRCTRL_MASKB
4.4.12. Alarm Routing Configuration register - ERRCTRL_ROUTA and ERRCTRL_ROUTB
4.4.13. Error Controller PGO LOG Reset Control register - ERRCTRL_PGOLOGRST
4.4.14. PGO0 and PGO4 Configuration registers - ERRCTRL_PGO0 and ERRCTRL_PGO4
4.4.15. FN_MODEIN Control Register - ERRCTRL_FNMODEIN
4.4.16. FN_MODEOUT register - ERRCTRL_FNMODEOUT
4.4.17. All Alarms After Fault Injection - ERRCTRL_FNGIALARMS
4.4.18. Error Controller Context Register - ERRCTRL_FNGICTXT4
4.4.19. CMP Mismatch CONTEXT Registers - ERRCTRL_FNGICMPCTXT0 … ERRCTRL_FNGICMPCTXT3
4.4.20. STATISTICS registers: ERRCTRL_FNGISTAT0 and ERRCTRL_FNGISTAT4
4.4.21. State register - ERRCTRL_FNPERIPHGI4
Visible to Intel only — GUID: jir1725868690849
Ixiasoft
2.2.2.1. Transitioning between System States
One-hot encodings of the fRSmartComp state:
- 0x01—DISABLED.
- 0x02—OD
- 0x04—FCS
- Others—Reserved/Unused
Configuring System States | Action |
---|---|
Read the current system | Reads the ERRCTRL_FNPERIPHGI4[7:0] register. |
Enter the DISABLED state | Writes the ERRCTRL_ENABLE_KEY register with the DISABLE key (0xABCDABCD). |
Enter the OD state from the DISABLED state | Writes the ERRCTRL_ENABLE_KEY register with the ENABLE key (0x75601522). |
The DISABLED state behavior:
- Provides a standard DCLS configuration in which the fRSmartComp’s diagnostic functionalities are active.
- The comparator is active unless the DISABLED state has been reached after a comparator mismatch. In such a case, it is not active.
- The Timeout, the Counters, and the Latent fault safety mechanisms are active.
- In this state, the fRSmartComp does not take most failure control actions in DISABLED state. In particular:
- If any alarm is generated, the system maintains the DISABLED state and does not activate a Timeout for restoration.
- If a Comparator enters self-detection, it generates the ALARM2, but it does not activate the dedicated logic to identify the fault position (third comparison).
- The automatic reset request after a Comparator mismatch is not generated, despite being enabled.