GTS CPRI PHY Intel® FPGA IP Design Example User Guide

ID 814583
Date 3/31/2024
Public

1.4. Simulating the Design Example Testbench

Figure 3. Procedure
Follow these steps to simulate the testbench:
  1. At the command prompt, change to the testbench simulation directory <design_example_dir>/example_testbench:
    cd <my_design>/example_testbench
  2. Run the simulation script for the supported simulator of your choice. The script compiles and runs the testbench in the simulator. Refer to the table Steps to Simulate the Testbench.
  3. Analyze the results. The successful testbench received five hyperframes, and displays "PASSED".
    Table 3.  Steps to Simulate the Testbench
    Simulator Instructions
    VCS* In the command line, type:
    sh run_vcs.sh
    VCS* MX In the command line, type:
    sh run_vcsmx.sh
    QuestaSim* or Questa* Intel® FPGA Edition In the command line, type:
    vsim -do run_vsim.do
    If you prefer to simulate without bringing up the GUI, type:
    vsim -c -do run_vsim.do
    Xcelium* In the command line, type:
    sh run_xcelium.sh

    The following sample output illustrates a successful simulation test run for 10.1376 Gbps with 1 CPRI channel:

    Figure 4. Simulation Output