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1.5. Compiling and Configuring the Design Example in Hardware
To compile hardware design example and configure it on your Agilex™ 5 device, follow these steps:
- Ensure that the hardware design example generation is complete.
- Launch the Quartus® Prime Pro Edition software and open the design example project file at <design_example_dir>/hardware_test_design/eth_ex_40g.qpf.
- Click Processing > Start Compilation.
- After a successful compilation, a .sof is available in <design_example_dir>/hardwarde_test_design.
- To program the hardware design example, launch the Clock Controller application and set the OUT0 frequency of Si5332-2 (U412) to 156.25 MHz.
Figure 5. Clock Controller
- Click Tools > Programmer > Hardware Setup.
- Select a programming device,
- Select and add the Agilex™ 5FPGA E-Series 065B Premium Development Kit (ES1) to Quartus® Prime Pro Edition to which your session can connect.
- Ensure that Mode is set to JTAG.
- Click Add Device. The Programmer displays a block diagram of the connections between the devices on your board.
- In the row with your .sof, check the box for .sof.
- Select the check box in the Program/Configure column.
- Click Start.
Power on reset is required after programming the Traffic test.