AN 987: Static Update Partial Reconfiguration Tutorial: for Intel Agilex® 7 FPGA Development Board

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ID 749443
Date 1/16/2024
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Document Table of Contents x
Answers to Top FAQs 1. Static Update Partial Reconfiguration Tutorial for Intel Agilex® 7 FPGA Development Board
1. Static Update Partial Reconfiguration Tutorial for Intel Agilex® 7 FPGA Development Board x
1.1. Tutorial Requirements 1.2. Reference Design Overview 1.3. Static Update Region Overview 1.4. Download Reference Design Files 1.5. Reference Design Walkthrough 1.6. Document Revision History of AN 987: Static Update Partial Reconfiguration Tutorial for Intel Agilex® 7 FPGA Development Board
1.5. Reference Design Walkthrough x
1.5.1. Step 1: Getting Started 1.5.2. Step 2: Create Design Partitions 1.5.3. Step 3: Allocate Placement and Routing Regions 1.5.4. Step 4: Define Personas 1.5.5. Step 5: Create Revisions 1.5.6. Step 6: Compile the Base Revision 1.5.7. Step 7: Set Up PR Implementation Revisions 1.5.8. Step 8: Change the SUPR Logic 1.5.9. Step 9: Program the Board 1.5.10. Modifying the SUPR Partition
1.5.5. Step 5: Create Revisions x
1.5.5.1. Setting the Base Revision 1.5.5.2. Creating Implementation Revisions
1.5.9. Step 9: Program the Board x
1.5.9.1. Troubleshooting PR Programming Errors
Answers to Top FAQs
1. Static Update Partial Reconfiguration Tutorial for Intel Agilex® 7 FPGA Development Board

1.5.3. Step 3: Allocate Placement and Routing Regions

For every base revision that you create, the Compiler uses the PR partition region allocation to place the corresponding persona core in the reserved region. Follow these steps to locate and assign a PR region in the device floorplan for your base revision:
  1. In the Project Navigator Hierarchy tab, right-click the u_blinking_led instance, and then click Logic Lock Region > Create New Logic Lock Region. The region appears in the Logic Lock Regions window.
  2. Specify a region Width of 5 and Height of 5.
  3. Double-click the u_blinking_led Region Name cell and rename it to pr_partition.
  4. Specify the placement region coordinates for u_blinking_led in the Origin column. The origin corresponds to the lower-left corner of the region. Specify the Origin as X166_Y199. The Compiler calculates (X170 Y203) as the top-right coordinate.
  5. Enable the Reserved and Core-Only options for the region.
  6. Double-click the Routing Region option. The Logic Lock Routing Region Settings dialog box appears.
  7. For the Routing Type, select Fixed with expansion. This option automatically assigns an Expansion length of one.
  8. Repeat the previous steps to allocate the following resources for the u_top_counter partition:
    • Region Name—supr_partition
    • Height—5
    • Width—5
    • Origin—X173_Y199
    • Routing Region— Fixed with expansion with Expansion length of one.
    • Reserved—On
    • Core-Only—On
    Figure 6. New Regions in Logic Lock Regions Window
    Note: The routing region must be larger than the placement region, to provide extra flexibility for the Compiler's routing stage, when the Compiler routes different personas.
  9. Your placement region must enclose the blinking_led logic. To select the placement region by locating the node in Chip Planner, right-click the u_blinking_led region name in the Logic Lock Regions window, and then click Locate Node > Locate in Chip Planner.
  10. Under Partition Reports, double-click Report Design Partitions. The Chip Planner highlights and color codes the region.
    Figure 7. Chip Planner Node Location for blinking_led

    Alternatively, adding the following lines to blinking_led.qsf creates these regions: 

    set_instance_assignment -name PARTITION pr_partition -to \
     u_blinking_led -entity top
set_instance_assignment -name PARTIAL_RECONFIGURATION_PARTITION ON \
     -to u_blinking_led -entity top
set_instance_assignment -name PARTITION supr_partition -to u_top_counter \
     -entity top
set_instance_assignment -name PARTIAL_RECONFIGURATION_PARTITION ON -to \
     u_top_counter -entity top
set_instance_assignment -name PLACE_REGION "X166 Y199 X170 Y203" -to \
     u_blinking_led
set_instance_assignment -name RESERVE_PLACE_REGION ON -to u_blinking_led
set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u_blinking_led
set_instance_assignment -name REGION_NAME pr_partition -to u_blinking_led
set_instance_assignment -name ROUTE_REGION "X165 Y198 X171 Y204" -to \
     u_blinking_led
set_instance_assignment -name RESERVE_ROUTE_REGION OFF -to u_blinking_led
set_instance_assignment -name PLACE_REGION "X173 Y199 X177 Y203" -to \
     u_top_counter
set_instance_assignment -name RESERVE_PLACE_REGION ON -to u_top_counter
set_instance_assignment -name CORE_ONLY_PLACE_REGION ON -to u_top_counter
set_instance_assignment -name REGION_NAME supr_partition -to u_top_counter
set_instance_assignment -name ROUTE_REGION "X172 Y198 X178 Y204" -to \
     u_top_counter
set_instance_assignment -name RESERVE_ROUTE_REGION OFF -to u_top_counter
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