6.2.1. F-Tile PMA/FEC Direct PHY Intel FPGA IP Core Soft CSR Registers
The following table describes the F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR registers. These registers are available for every fracture and their function is the same as the single rate IP. However, to control these registers for different fractures, refer to Address Offset for the 12 Fractures Available in One F-Tile for the starting address for each fracture.
| Byte Address 2 [19:0] | Bit Offset | Name | Description | Access | Reset Value |
|---|---|---|---|---|---|
| 20’h800 - 20’h818 | N/A | Existing single rate F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR registers. Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. | |||
| 20’h81C
Note: This register is only available in the F-Tile PMA/FEC Direct PHY Multirate Intel® FPGA IP.
|
[0] | fracture_active | 1: Indicates that this fracture is active. 0: Indicates that the fracture is not active and not in use. |
Read-only | Reflects startup profile value. |
| Byte Address2 | Name | Description |
|---|---|---|
| 1st Fracture | ||
| 20’h800 - 20’h818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 1st fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h81C | 1st fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 20’h820 - 20’h82C | Refer to F-Tile PMA/FEC Direct PHY Multirate Intel FPGA IP Core Reconfiguration Soft CSR Registers for the details. | These registers are only available in the 1st fracture. You can control these registers to change the fracture from one setting to another setting within the reconfiguration subset mode. Refer to Controlling the Fracture for Reconfiguration Subset: 100G-4 and Fracture Count=1 for an example. |
| 2nd Fracture | ||
| 20’h10800 - 20’h10818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 2nd fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h1081C | 2nd fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 3rd Fracture | ||
| 20’h20800 - 20’h20818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 3rd fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h2081C | 3rd fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 4th Fracture | ||
| 20’h30800 - 20’h30818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 4th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h3081C | 4th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 5th Fracture | ||
| 20’h40800 - 20’h40818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 5th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h4081C | 5th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 6th Fracture | ||
| 20’h50800 - 20’h50818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 6th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h5081C | 6th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 7th Fracture | ||
| 20’h60800 - 20’h60818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 7th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h6081C | 7th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 8th Fracture | ||
| 20’h70800 - 20’h70818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 8th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h7081C | 8th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 9th Fracture | ||
| 20’h80800 - 20’h80818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 9th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h8081C | 9th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 10th Fracture | ||
| 20’h90800 - 20’h90818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 10th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’h9081C | 10th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 11th Fracture | ||
| 20’hA0800 - 20’hA0818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 11th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’hA081C | 11th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
| 12th Fracture | ||
| 20’hB0800 - 20’hB0818 | Existing F-Tile PMA/FEC Direct PHY Intel® FPGA IP soft CSR space for 12th fracture | Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP Register Map for more information. |
| 20’hB081C | 12th fracture_active | Status bit that indicates that this fracture is active; 1'b1 indicates that the fracture is active. |
2 The physical Avalon Memory-Mapped Interface(AVMM) is based on 32-bit word addresses. However this document refers to the registers as byte addresses, you can convert to word addresses by shifting 2 bits to the right (divide by 4). You can use a byte enabled signal to address individual byes.