Visible to Intel only — GUID: qku1643133033809
Ixiasoft
2.1. Port Numbering Scheme
2.2. Clock Signals
2.3. Reset Signals
2.4. Fractured MAC Segmented Interface for FGT Transceivers
2.5. Fractured MAC Segmented Interface for FHT Transceivers
2.6. Fractured MAC Avalon ST Client Interface for FGT Transceivers
2.7. Fractured MAC Avalon ST Client Interface for FHT Transceivers
2.8. Fractured MII PCS-Only Interface for FGT Transceivers
2.9. Fractured MII PCS-Only Interface for FHT Transceivers
2.10. Fractured PCS66 Interface for OTN/FlexE for FGT Transceivers
2.11. Fractured PCS66 Interface for OTN/FlexE for FHT Transceivers
2.12. MAC Flow Control Interface
2.13. Status Interface
2.14. Avalon® Memory-Mapped Reconfiguration Interfaces
2.15. Auto-Negotiation and Link Training Interface
2.16. Precision Time Protocol Interface
Visible to Intel only — GUID: qku1643133033809
Ixiasoft
1.5. Resource Utilization
Reconfiguration Group (with selected MAC mode) |
Combinatorial ALUTs | Logic Registers | Block Memory Bits |
---|---|---|---|
25GE-1 | 1,407 | 2,420 | 0 |
50GE-1 | 1,851 | 4,167 | 0 |
100GE-4 | 6,551 | 14,381 | 0 |
100GE-4 (including 40GE) | 7,489 | 15,718 | 0 |
100GE-2 | 4,116 | 10,490 | 0 |
400GE-8 | 10,930 | 28,795 | 0 |
200GE-4 | 8,144 | 21,347 | 0 |