F-Tile HDMI Intel® FPGA IP Design Example User Guide

ID 709314
Date 5/23/2024
Public

Visible to Intel only — GUID: rxs1654229136685

Ixiasoft

Document Table of Contents

3.9.1. Supporting Additional Video Resolutions

To support additional video resolutions, follow these steps:

  1. Modify the cvi_res_switch function in main.c software file to configure AXI2CV video mode bank to the desired resolution.
  2. For RX-TX retransmit design with video frame buffer:
    1. Modify the calc_frl_txclk function in the main software to add the correct TX video clock frequency configuration.
    2. Add the desired TV video clock frequency setting in set_txclk_freq function.
  3. Rebuild the software
    1. Open Nios® V Terminal.
    2. Change directory to /software/tx_control.
    3. Run the make command.