Visible to Intel only — GUID: hih1574139692370
Ixiasoft
Visible to Intel only — GUID: hih1574139692370
Ixiasoft
4.5.4.1. 100GE MAC+PCS with Optional RS-FEC Dynamic Reconfiguration Hardware Design Example Components
- E-Tile Dynamic Reconfiguration Design Example core. The IP core consists of four 25G channels with optional RS-FEC or one 100G channel.
- Client logic that coordinates the programming of the IP core and packet generation.
- Avalon® memory-mapped interface address decoder to decode reconfiguration address space for E-Tile Hard IP for Ethernet core and RS-FEC modules during reconfiguration accesses.
- JTAG controller that communicates with the System Console. You communicate with the client logic through the System Console.
The hardware design example uses run_test command to initiate packet transmission from packet generator to the IP core. By default, the internal serial loopback is disabled in this design example. Use the loop_on command to enable the internal serial loopback. When you use the run_test command to run the hardware test in the design examples, the script tests 100GE with RS-FEC. Use the run_test_dr to run the hardware test to perform all reconfigurable switches. The client logic reads and print out the MAC statistic registers when the packet transmissions are complete.
The following sample script illustrates a reconfiguration sequence:
source hwtest/main.tcl set BASE_EHIP 0x400 #DR to 25GNF # configure dr_cfg_ch_en register reg_write $BASE_EHIP 0x13 0xf; # configure dr_cfg_fec_en register reg_wrtie $BASE_EHIP 0x15 0x0; # configure dr_control and trigger reconfig registers reg_write 0x4009 0x1;
% cd hwtest/altera_dr % run_test_dr_sw "100G_rsfec" "100G_nofec" ----------------------------------- ----- Switching to 100G_nofec ----- ----------------------------------- - Checking init_adaptation status - ----------------------------------- channel 0 init_adaptation status is 0 channel 1 init_adaptation status is 0 channel 2 init_adaptation status is 0 channel 3 init_adaptation status is 0 Running Traffic_test_100G_nofec test RX PHY Register Access: Checking Clock Frequencies (KHz) REFCLK :2 (KHZ) TXCLK :40283 (KHZ) RXCLK :40285 (KHZ) TXRSCLK :0 (KHZ) RXRSCLK :0 (KHZ) RX PHY Status Polling Rx Frequency Lock Status 0x0000000f Mac Clock in OK Condition? 0x00000001 Rx Frame Error 0x000fffff Rx PHY Fully Aligned? 0x00000001 Rx AM LOCK Condition? 0x00000001 Rx Lanes Deskewed Condition? 0x00000001 wait for phy lock 0, locked=0x00000001 RX PHY Register Access: Checking Clock Frequencies (KHz) REFCLK :0 (KHZ) TXCLK :40283 (KHZ) RXCLK :40284 (KHZ) TXRSCLK :0 (KHZ) RXRSCLK :0 (KHZ) RX PHY Status Polling Rx Frequency Lock Status 0x0000000f Mac Clock in OK Condition? 0x00000001 Rx Frame Error 0x00000000 Rx PHY Fully Aligned? 0x00000001 Rx AM LOCK Condition? 0x00000001 Rx Lanes Deskewed Condition? 0x00000001 RX PHY Register Access: Checking Clock Frequencies (KHz) REFCLK :1 (KHZ) TXCLK :40282 (KHZ) RXCLK :40285 (KHZ) TXRSCLK :0 (KHZ) RXRSCLK :0 (KHZ) RX PHY Status Polling Rx Frequency Lock Status 0x0000000f Mac Clock in OK Condition? 0x00000001 Rx Frame Error 0x00000000 Rx PHY Fully Aligned? 0x00000001 Rx AM LOCK Condition? 0x00000001 Rx Lanes Deskewed Condition? 0x00000001 ========================================================================================== STATISTICS FOR BASE 18688 (Rx) ========================================================================================== Fragmented Frames : 0 Jabbered Frames : 0 Any Size with FCS Err Frame : 0 Right Size with FCS Err Fra : 0 Multicast data Err Frames : 0 Broadcast data Err Frames : 0 Unicast data Err Frames : 0 Multicast control Err Frame : 0 Broadcast control Err Frame : 0 Unicast control Err Frames : 0 Pause control Err Frames : 0 64 Byte Frames : 14620 65 - 127 Byte Frames : 14148 128 - 255 Byte Frames : 28658 256 - 511 Byte Frames : 57110 512 - 1023 Byte Frames : 115595 1024 - 1518 Byte Frames : 111182 1519 - MAX Byte Frames : 0 > MAX Byte Frames : 3342259 Rx Frame Starts : 3683572 Multicast data OK Frame : 0 Broadcast data OK Frame : 0 Unicast data OK Frames : 3675761 Multicast Control Frames : 0 Broadcast Control Frames : 0 Unicast Control Frames : 0 Pause Control Frames : 0 ========================================================================================== STATISTICS FOR BASE 18432 (Tx) ========================================================================================== Fragmented Frames : 0 Jabbered Frames : 0 Any Size with FCS Err Frame : 0 Right Size with FCS Err Fra : 0 Multicast data Err Frames : 0 Broadcast data Err Frames : 0 Unicast data Err Frames : 0 Multicast control Err Frame : 0 Broadcast control Err Frame : 0 Unicast control Err Frames : 0 Pause control Err Frames : 0 64 Byte Frames : 14620 65 - 127 Byte Frames : 14148 128 - 255 Byte Frames : 28658 256 - 511 Byte Frames : 57110 512 - 1023 Byte Frames : 115595 1024 - 1518 Byte Frames : 111182 1519 - MAX Byte Frames : 0 > MAX Byte Frames : 3342259 Tx Frame Starts : 3683572 Multicast data OK Frame : 0 Broadcast data OK Frame : 0 Unicast data OK Frames : 3675761 Multicast Control Frames : 0 Broadcast Control Frames : 0 Unicast Control Frames : 0 Pause Control Frames : 0 Traffic_test_100G_nofec: Pass