E-Tile Hard IP Agilex™ 7 Design Example User Guide: Ethernet, E-tile CPRI PHY and Dynamic Reconfiguration

ID 683860
Date 4/30/2024
Public
Document Table of Contents

1. About E-tile Hard IP Agilex™ 7 Design Example User Guide

Updated for:
Intel® Quartus® Prime Design Suite 24.1
This document consists of the following design examples:
  • E-tile Ethernet IP for Intel Agilex® 7 FPGA design example
  • E-tile CPRI PHY Intel® FPGA IP design example
  • E-Tile Dynamic Reconfiguration Design Example