PHY Lite for Parallel Interfaces FPGA IP User Guide

ID 683716
Date 3/31/2025
Public

Visible to Intel only — GUID: cey1599793348693

Ixiasoft

Document Table of Contents

6.3. Getting Started

You can instantiate the PHY Lite for Parallel Interfaces FPGA IP for Stratix® 10 devices from IP Catalog in Quartus® Prime software. Altera provides an integrated parameter editor that allows you to customize this IP to support a wide variety of applications.

This IP is located in Libraries > Basic Functions > I/O of the IP catalog.