PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 7/15/2024
Public
Document Table of Contents

3.3. Getting Started

You can instantiate the PHY Lite for Parallel Interfaces Intel® FPGA IP for Agilex™ 7 M-Series devices from the Quartus® Prime IP Catalog. Intel provides an integrated parameter editor that allows you to customize this IP to support a wide variety of applications.

In the IP catalog, access the IP in Libraries > Basic Functions > I/O.