PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 8/02/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.3.2.3. Input Path Signals

Table 17.  Input Path SignalsInput path signals are signals that are available when you set Pin Type to Input or Bidirectional. The <n> in the signal names in the following table represent the group number in the IP.
Signal Name Direction Width Description
group_<n>_data_to_core Output

Quarter rate-DDR: 8 x PIN_WIDTH

Half rate-DDR:4 x PIN_WIDTH

Full rate-DDR: 2 x PIN_WIDTH

Quarter-rateSDR: 4 x PIN_WIDTH

Half rate-SDR: 2 x PIN_WIDTH

Full rate-SDR: 1 x PIN_WIDTH

Output data to the core logic. Valid on group_<n>_rdata_valid. Synchronous to the core_clk_out output from the IP.
group_rdata_en Input

Quarter-rate: 4

Half-rate: 2

Full-rate: 1

Read enable signal.

This signal is set to high after a read command is issued. Synchronous to the core_clk_out output from the IP.

When using the IP as a receiver, assert this signal after interface_locked signal is asserted and group_strobe_in is stable.

Each group has separate read enable.

group_<n>_rdata_valid Output

Quarter-rate: 4

Half-rate: 2

Full-rate: 1

Read valid signal

This signal determines which data are valid when reading from RX FIFO.

Synchronous to the core_clk_out output from the IP.

group_<n>_data_in/

group_<n>_data_io

Input/ Bidirectional 1 to 22

Input data from external device. Synchronous to the group_<n>_strobe_in or group_<n>_strobe_io input. The first data_in must be associated with positive edge of group_<n>_strobe_in/ group_<n>_strobe_io.

If the pin type is set to Input, the group_<n>_data_in ports are used. If the pin type is set to Bidirectional, the group_<n>_data_io ports are used.

group_<n>_data_in_n/

group_<n>_data_io_n

Input/ Bidirectional 1 to 22

Differential input data from external device. Synchronous to the group_<n>_strobe_in_n or group_<n>_strobe_io_n output from the IP,

group_<n>_strobe

_in/ group_<n>_strobe

_io

Input/ Bidirectional 1 Input strobe from external device. If the pin type is set to Input, the group_<n>_strobe_in signal is used. If the pin type is set to Bidirectional, the group_<n>_strobe_io signal is used.

group_<n>_strobe

_in_n/ group_<n>_strobe

_io_n

Input/ Bidirectional 1

Negative strobe from external device. This is used if Strobe Configuration is set to Differential. If the pin type is set to Input, the group_<n>_strobe_in_n signal is used. If the pin type is set to Bidirectional, the group_<n>_strobe_io_n signal is used.