Creating Heterogeneous Memory Systems in Intel® FPGA SDK for OpenCL Custom Platforms

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ID 683654
Date 12/13/2016
Public
Document Table of Contents
Document Table of Contents x
1. Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms
1. Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms x
1.1. Verifying the Functionality of the FPGA Board and the EMIF Interfaces 1.2. Modifying the board_spec.xml File 1.3. Setting Up Multiple Memory Dividers in Qsys 1.4. Modifying the Boardtest Program and the Host Code for Your Heterogeneous Memory Solution 1.5. Verifying the Functionality of Your Heterogeneous Memory System 1.6. Document Revision History
1. Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms

1. Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms

The implementation of heterogeneous memory in a Custom Platform allows for more external memory interface (EMIF) bandwidth as well as larger and faster memory accesses. The combination of heterogenous memory access with an optimized OpenCL™ kernel can result in significant performance improvements for your OpenCL system.

This application note provides guidance on creating heterogeneous memory systems in a Custom Platform for use with the Intel® FPGA SDK for OpenCL™ 1. Intel® assumes that you are an experienced FPGA designer who is developing Custom Platforms that contains heterogeneous memory systems.

Prior to creating the heterogeneous memory systems, familiarize yourself with the Intel® FPGA SDK for OpenCL™ documents specified below.


Section Content
Verifying the Functionality of the FPGA Board and the EMIF Interfaces
Modifying the board_spec.xml File
Setting Up Multiple Memory Dividers in Qsys
Modifying the Boardtest Program and the Host Code for Your Heterogeneous Memory Solution
Verifying the Functionality of Your Heterogeneous Memory System
Document Revision History

Related Information
OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission of the Khronos Group™.
1 The Intel FPGA SDK for OpenCL is based on a published Khronos Specification, and has passed the Khronos Conformance Testing Process. Current conformance status can be found at www.khronos.org/conformance.
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