Intel Agilex® 7 Hard Processor System Component Reference Manual

ID 683581
Date 4/10/2023
Public
Document Table of Contents

2.3.1.3. Peripheral FPGA Clocks

Figure 15.  Platform Designer Peripheral FPGA Clocks Sub-Window

The table below provides a description for each of the parameters in the "Peripheral FPGA Clocks" sub-window.

Table 5.  Peripheral FPGA Clocks Parameters Descriptions
Parameter Name Parameter Description
EMAC 0 (emac0_md_clk clock frequency) If EMAC 0 peripheral is routed to FPGA, use the input field to specify EMAC 0 MDIO clock frequency
EMAC 0 (emac0_gtx_clk clock frequency) If EMAC 0 peripheral is routed to FPGA, use the input field to specify EMAC 0 transmit clock frequency
EMAC 1 (emac1_md_clk clock frequency) If EMAC 1 peripheral is routed to FPGA, use the input field to specify EMAC 1 MDIO clock frequency
EMAC 1 (emac1_gtx_clk clock frequency) If EMAC 1 peripheral is routed to FPGA, use the input field to specify EMAC 1 transmit clock frequency
EMAC 2 (emac2_md_clk clock frequency) If EMAC 2 peripheral is routed to FPGA, use the input field to specify EMAC 2 MDIO clock frequency
EMAC 2 (emac2_gtx_clk clock frequency) If EMAC 2 peripheral is routed to FPGA, use the input field to specify EMAC 2 transmit clock frequency
SD/MMC (sdmmc_cclk) If this peripheral pin multiplexing is configured to route to FPGA fabric, use the input field to specify the SD/MMC sdmmc_cclk clock frequency
SPIM 0 (spim0_sclk_out clock frequency) If SPI master 0 peripheral is routed to FPGA, use the input field to specify SPI master 0 output clock frequency
SPIM 1 (spim1_sclk_out clock frequency) If SPI master 1 peripheral is routed to FPGA, use the input field to specify SPI master 1 output clock frequency
I2C0 (i2c0_clk clock frequency) If I2C 0 peripheral is routed to FPGA, use the input field to specify I2C 0 output clock frequency
I2C1 (i2c1_clk clock frequency) If I2C 1 peripheral is routed to FPGA, use the input field to specify I2C 1 output clock frequency
I2CEMAC0 (i2cemac0_clk) If this peripheral pin multiplexing is configured to route to the FPGA fabric, use the input field to specify the I2CEMAC0 i2cemac0_clk clock frequency
I2CEMAC1 (i2cemac1_clk) If this peripheral pin multiplexing is configured to route to the FPGA fabric, use the input field to specify the I2CEMAC1 i2cemac1_clk clock frequency
I2CEMAC2 (i2cemac2_clk) If this peripheral pin multiplexing is configured to route to the FPGA fabric, use the input field to specify the I2CEMAC2 i2cemac2_clk clock frequency