IOPLL Reconfig Intel FPGA IP Core Release Notes

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ID 683579
Date 6/22/2020
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IOPLL Reconfig Intel FPGA IP Core Release Notes
IOPLL Reconfig Intel FPGA IP Core Release Notes x
IOPLL Reconfig Intel FPGA IP v19.4.0 IOPLL Reconfig Intel FPGA IP v19.3.0 IOPLL Reconfig Intel FPGA IP v18.0 Intel FPGA IOPLL Reconfig v17.1 Intel® Stratix® 10 Clocking and PLL User Guide Archives Intel® Agilex™ Clocking and PLL User Guide Archives
IOPLL Reconfig Intel FPGA IP Core Release Notes

IOPLL Reconfig Intel FPGA IP Core Release Notes

If a release note is not available for a specific IP version, the IP has no changes in that version. For information on IP update releases up to v18.1, refer to the Intel® Quartus® Prime Design Suite Update Release Notes.

IP versions are the same as the Intel® Quartus® Prime Design Suite software versions up to v19.1. From Intel® Quartus® Prime Design Suite software version 19.2 or later, IP cores have a new IP versioning scheme.

The IP version (X.Y.Z) number may change from one Intel Quartus Prime software version to another. A change in:

  • X indicates a major revision of the IP. If you update your Intel Quartus Prime software, you must regenerate the IP.
  • Y indicates the IP includes new features. Regenerate your IP to include these new features.
  • Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
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