Multi Channel DMA Intel® FPGA IP for PCI Express Design Example User Guide

ID 683517
Date 10/28/2022
Public

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If the BAS support is enabled on hardware, enable the following flag in: dpdk/dpdk/drivers/net/mcdma/rte_pmd_mcdma.h
#define PCIe_SLOT 0 /* 0 – x16, 1 – x8 */
To enable the config IFC_QDMA_INTF_AVST in the file "software/dpdk/dpdk/patches/v20.05-rc1/dpdk/drivers/net/mcdma/base/mcdma_ip_params.h", use the following command:
#undef IFC_QDMA_INTF_AVST

Commands:

  1. To verify the write operation:
     ./build/mcdma-test -- -b 0000:01:00.0 --bar=0 --bas -s 512 -t
    Figure 37. BAS Write Operation
  2. To verify the read operation:
     ./build/mcdma-test -- -b 0000:01:00.0 --bar=0 --bas -s 512 -r
    Figure 38. BAS Read Operation
  3. To verify the write and read operation:
    ./build/mcdma-test -- -b 0000:01:00.0 --bar=0 --bas -s 512 -z
    Figure 39. BAS Write and Read Operation

    Performance test:

    The below log is collected on Gen3x16 H-tile
     ./build/mcdma-test -- -b 0000:01:00.0 --bar=0 --bas_perf -s 16384 -z
    Figure 40. Performance Test