Intel® FPGA SDK for OpenCL™ Standard Edition: Custom Platform Toolkit User Guide

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ID 683398
Date 5/04/2018
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide 2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide x
1.1. Prerequisites for the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit 1.2. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.3. Custom Platform Automigration for Forward Compatibility 1.4. Creating an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.5. Applying for the Intel® FPGA SDK for OpenCL™ Standard Edition Preferred Board Status 1.6. Shipping Recommendations 1.7. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Design Revision History
1.2. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform x
1.2.1. Directories and Files in an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.2.2. Recommendations for Structuring the Custom Platform Directory
1.3. Custom Platform Automigration for Forward Compatibility x
1.3.1. Customizing Automigration
1.4. Creating an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform x
1.4.1. Designing the Board Hardware 1.4.2. Creating the Board XML Files 1.4.3. Creating the MMD Library 1.4.4. Setting Up the FPGA Client Driver 1.4.5. Providing Intel® FPGA SDK for OpenCL™ Standard Edition Utilities Support 1.4.6. Testing the Hardware Design
1.4.1. Designing the Board Hardware x
1.4.1.1. Creating the Board Platform Designer (Standard) System 1.4.1.2. Establishing Guaranteed Timing Flow
1.4.1.1. Creating the Board Platform Designer (Standard) System x
1.4.1.1.1. General Quality of Results Considerations for the Exported Board Partition
1.4.2. Creating the Board XML Files x
1.4.2.1. Creating the board_env.xml File 1.4.2.2. Creating the board_spec.xml File
1.4.2.1. Creating the board_env.xml File x
1.4.2.1.1. Testing the board_env.xml File
1.4.3. Creating the MMD Library x
1.4.3.1. Kernel Power-up State
2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material x
2.1. The Board Platform Designer (Standard) Subsystem 2.2. XML Elements, Attributes, and Parameters in the board_spec.xml File 2.3. MMD API Descriptions 2.4. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Manual Revision History
2.1. The Board Platform Designer (Standard) Subsystem x
2.1.1. Intel® FPGA SDK for OpenCL™ Standard Edition-Specific Platform Designer (Standard) System Components
2.1.1. Intel® FPGA SDK for OpenCL™ Standard Edition-Specific Platform Designer (Standard) System Components x
2.1.1.1. OpenCL Kernel Clock Generator 2.1.1.2. OpenCL Kernel Interface 2.1.1.3. OpenCL Memory Bank Divider
2.2. XML Elements, Attributes, and Parameters in the board_spec.xml File x
2.2.1. board 2.2.2. device 2.2.3. global_mem 2.2.4. host 2.2.5. channels 2.2.6. interfaces 2.2.7. interface 2.2.8. compile
2.3. MMD API Descriptions x
2.3.1. aocl_mmd_get_offline_info 2.3.2. aocl_mmd_get_info 2.3.3. aocl_mmd_open 2.3.4. aocl_mmd_close 2.3.5. aocl_mmd_read 2.3.6. aocl_mmd_write 2.3.7. aocl_mmd_copy 2.3.8. aocl_mmd_set_interrupt_handler 2.3.9. aocl_mmd_set_status_handler 2.3.10. aocl_mmd_yield 2.3.11. aocl_mmd_shared_mem_alloc 2.3.12. aocl_mmd_shared_mem_free 2.3.13. aocl_mmd_reprogram 2.3.14. aocl_mmd_hostchannel_create 2.3.15. aocl_mmd_hostchannel_destroy 2.3.16. aocl_mmd_hostchannel_get_buffer 2.3.17. aocl_mmd_hostchannel_ack_buffer
2.3.13. aocl_mmd_reprogram x
2.3.13.1. Reprogram Support
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide
2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material

2.4. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Manual Revision History

Document Version Intel® Quartus® Prime Version Changes
2018.05.04 18.0
  • Removed information pertaining to the Intel® FPGA SDK for OpenCL™ Pro Edition and the Intel® Quartus® Prime Pro Edition software.
  • In interface, added information on the waitrequest_allowance parameter.
Date Version Changes
November 2017 2017.11.03
  • Added the following new pages:
    • aocl_mmd_hostchannel_create
    • aocl_mmd_hostchannel_destroy
    • aocl_mmd_hostchannel_get_buffer
    • aocl_mmd_hostchannel_ack_buffer
May 2017 2017.05.08
  • Maintenance release.
October 2016 2016.10.31
  • Rebranded Altera SDK for OpenCL to Intel® FPGA SDK for OpenCL™ .
  • Rebranded Altera Offline Compiler to Intel® FPGA SDK for OpenCL™ Offline Compiler
  • In OpenCL Memory Bank Divider, added information about the Split read/write bursts on burst word boundary parameter..
May 2016 2016.05.02
  • In the global_mem section under XML Elements, Attributes, and Parameters in the board_spec.xml File, added example calculations for determining the max_bandwidth value.
  • In the interface section under XML Elements, Attributes, and Parameters in the board_spec.xml File, modified the global_mem-specific definitions for the name and port attributes.
  • Added the option to assign a value of none to the qsys_file attribute within the compile element.
  • Fixed a documentation error in the aocl_mmd_copy section.
November 2015 2015.11.02
  • Maintenance release, and changed instances of Quartus® II to Quartus Prime.
May 2015 15.0.0
  • Maintenance release.
December 2014 14.1.0
  • Under XML Elements, Attributes, and Parameters in the board_spec.xml File, added information on the compile eXtensible Markup Language element and its associated attributes and parameters.
  • Under MMD API Descriptions, added information on the AOCL_MMD_USES_YIELD and the AOCL_MMD_MEM_TYPES_SUPPORTED enum values for the requested_info_id variable in the aocl_mmd_get_offline_info function.
October 2014 14.0.1
  • Reorganized existing document into two chapters.
June 2014 14.0.0
  • Initial release.
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