Intel® FPGA SDK for OpenCL™ Standard Edition: Custom Platform Toolkit User Guide

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ID 683398
Date 5/04/2018
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide 2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide x
1.1. Prerequisites for the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit 1.2. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.3. Custom Platform Automigration for Forward Compatibility 1.4. Creating an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.5. Applying for the Intel® FPGA SDK for OpenCL™ Standard Edition Preferred Board Status 1.6. Shipping Recommendations 1.7. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Design Revision History
1.2. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform x
1.2.1. Directories and Files in an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform 1.2.2. Recommendations for Structuring the Custom Platform Directory
1.3. Custom Platform Automigration for Forward Compatibility x
1.3.1. Customizing Automigration
1.4. Creating an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform x
1.4.1. Designing the Board Hardware 1.4.2. Creating the Board XML Files 1.4.3. Creating the MMD Library 1.4.4. Setting Up the FPGA Client Driver 1.4.5. Providing Intel® FPGA SDK for OpenCL™ Standard Edition Utilities Support 1.4.6. Testing the Hardware Design
1.4.1. Designing the Board Hardware x
1.4.1.1. Creating the Board Platform Designer (Standard) System 1.4.1.2. Establishing Guaranteed Timing Flow
1.4.1.1. Creating the Board Platform Designer (Standard) System x
1.4.1.1.1. General Quality of Results Considerations for the Exported Board Partition
1.4.2. Creating the Board XML Files x
1.4.2.1. Creating the board_env.xml File 1.4.2.2. Creating the board_spec.xml File
1.4.2.1. Creating the board_env.xml File x
1.4.2.1.1. Testing the board_env.xml File
1.4.3. Creating the MMD Library x
1.4.3.1. Kernel Power-up State
2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material x
2.1. The Board Platform Designer (Standard) Subsystem 2.2. XML Elements, Attributes, and Parameters in the board_spec.xml File 2.3. MMD API Descriptions 2.4. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Manual Revision History
2.1. The Board Platform Designer (Standard) Subsystem x
2.1.1. Intel® FPGA SDK for OpenCL™ Standard Edition-Specific Platform Designer (Standard) System Components
2.1.1. Intel® FPGA SDK for OpenCL™ Standard Edition-Specific Platform Designer (Standard) System Components x
2.1.1.1. OpenCL Kernel Clock Generator 2.1.1.2. OpenCL Kernel Interface 2.1.1.3. OpenCL Memory Bank Divider
2.2. XML Elements, Attributes, and Parameters in the board_spec.xml File x
2.2.1. board 2.2.2. device 2.2.3. global_mem 2.2.4. host 2.2.5. channels 2.2.6. interfaces 2.2.7. interface 2.2.8. compile
2.3. MMD API Descriptions x
2.3.1. aocl_mmd_get_offline_info 2.3.2. aocl_mmd_get_info 2.3.3. aocl_mmd_open 2.3.4. aocl_mmd_close 2.3.5. aocl_mmd_read 2.3.6. aocl_mmd_write 2.3.7. aocl_mmd_copy 2.3.8. aocl_mmd_set_interrupt_handler 2.3.9. aocl_mmd_set_status_handler 2.3.10. aocl_mmd_yield 2.3.11. aocl_mmd_shared_mem_alloc 2.3.12. aocl_mmd_shared_mem_free 2.3.13. aocl_mmd_reprogram 2.3.14. aocl_mmd_hostchannel_create 2.3.15. aocl_mmd_hostchannel_destroy 2.3.16. aocl_mmd_hostchannel_get_buffer 2.3.17. aocl_mmd_hostchannel_ack_buffer
2.3.13. aocl_mmd_reprogram x
2.3.13.1. Reprogram Support
1. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit User Guide
2. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit Reference Material

1.5. Applying for the Intel® FPGA SDK for OpenCL™ Standard Edition Preferred Board Status

Registering your Custom Platform and the supported FPGA boards in the Intel® FPGA SDK for OpenCL™ Standard Edition Preferred Board Partner Program allows them to benefit from ongoing internal testing across versions of the Intel® Quartus® Prime Design Suite. Intel® -tested Custom Platforms and boards are more likely to be forward compatible with future Intel® Quartus® Prime Design Suite versions.

For your Custom Platform and the supported FPGA boards to achieve the Intel® FPGA SDK for OpenCL™ Preferred Board status, you must generate the following data and submit it to Intel® :

  1. The output from invoking the aocl board-xml-test command.
  2. The output from invoking the aoc -list-boards command.
  3. The outputs from the host compilation, host execution, and all Intel® Quartus® Prime report files (.rpt). Also, for each board in your Custom Platform, the acl_quartus_report.txt file from the following tests:
    1. All tests included in the INTELFPGAOCLSDKROOT/board/custom_platform_toolkit/tests directory, where INTELFPGAOCLSDKROOT points to location of the Intel® FPGA SDK for OpenCL™ Standard Edition installation.
    2. Compilations of the following examples on the OpenCL Design Examples page of the Intel FPGA website:
      1. Vector Addition
      2. Matrix Multiplication
      3. FFT (1D)
      4. FFT (2D)
      5. Sobel Filter
      6. Finite Difference Computation (3D)
  4. For each board in the Custom Platform, a summary of the following:
    1. HOST-TO-MEMORY BANDWIDTH as reported by the boardtest test in the Custom Platform Toolkit (/tests/boardtest).
    2. KERNEL-TO-MEMORY BANDWIDTH as reported by the boardtest test.
    3. Throughput in swap-and-execute(s) reported by the swapper test in the Custom Platform Toolkit (/tests/swapper).
    4. Actual clock freq as reported in the acl_quartus_report.txt file from the blank test in the Custom Platform Toolkit ( INTELFPGAOCLSDKROOT/board/custom_platform_toolkit/tests/blank).
    Important: Use global routing to reduce consumption of local routing resources. Using global routing is necessary because it helps meet timing and improve kernel performance (Fmax). Use global or regional routing for any net with fan-out greater than 5000, and for kernel clock, 2x clock and reset. Check the Non-Global High Fan-Out Signals report in the Resource subsection, which is under the Fitter section of the Compilation Report.
  5. Submit the necessary number of boards to Intel® for in-house regression testing. Regression testing tests the out-of-the-box experience for each board variant on each operating system that your Custom Platform supports. Ensure that you test the procedure outlined below before you submit your boards:
    1. Install the board into the physical machine.
    2. Boot the machine and invoke the aocl install <path_to_customplatform> utility command.
    3. Invoke the aocl diagnose command.
    4. Run the SDK's test programs. The tester can also invoke the aocl program <device_name> <kernel_filename>.cl command to verify the functionality of the program utility.
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