Serial Lite III Streaming Intel® FPGA IP User Guide

ID 683330
Date 5/26/2023
Public

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5.1.2.3. Lane Alignment Module

The lane alignment module interfaces with the Native PHY or Interlaken PHY IP core to access incoming data. This module removes lane skew from the incoming serial data streams and aligns various lanes using the Interlaken's synchronization marker. After alignment is achieved, the module continuously monitors the synchronization markers in the Interlaken meta frames for any loss of alignment.