Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 7/08/2024
Public
Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 1D LUT Intel® FPGA IP 9. 3D LUT Intel® FPGA IP 10. Adaptive Noise Reduction Intel® FPGA IP 11. Advanced Test Pattern Generator Intel® FPGA IP 12. AXI-Stream Broadcaster Intel® FPGA IP 13. Bits per Color Sample Adapter Intel FPGA IP 14. Black Level Correction Intel® FPGA IP 15. Black Level Statistics Intel® FPGA IP 16. Chroma Key Intel® FPGA IP 17. Chroma Resampler Intel® FPGA IP 18. Clipper Intel® FPGA IP 19. Clocked Video Input Intel® FPGA IP 20. Clocked Video to Full-Raster Converter Intel® FPGA IP 21. Clocked Video Output Intel® FPGA IP 22. Color Plane Manager Intel® FPGA IP 23. Color Space Converter Intel® FPGA IP 24. Defective Pixel Correction Intel® FPGA IP 25. Deinterlacer Intel® FPGA IP 26. Demosaic Intel® FPGA IP 27. FIR Filter Intel® FPGA IP 28. Frame Cleaner Intel® FPGA IP 29. Full-Raster to Clocked Video Converter Intel® FPGA IP 30. Full-Raster to Streaming Converter Intel® FPGA IP 31. Genlock Controller Intel® FPGA IP 32. Generic Crosspoint Intel® FPGA IP 33. Genlock Signal Router Intel® FPGA IP 34. Guard Bands Intel® FPGA IP 35. Histogram Statistics Intel® FPGA IP 36. Interlacer Intel® FPGA IP 37. Mixer Intel® FPGA IP 38. Pixels in Parallel Converter Intel® FPGA IP 39. Scaler Intel® FPGA IP 40. Stream Cleaner Intel® FPGA IP 41. Switch Intel® FPGA IP 42. Tone Mapping Operator Intel® FPGA IP 43. Test Pattern Generator Intel® FPGA IP 44. Unsharp Mask Intel® FPGA IP 45. Video and Vision Monitor Intel FPGA IP 46. Video Frame Buffer Intel® FPGA IP 47. Video Frame Reader Intel FPGA IP 48. Video Frame Writer Intel FPGA IP 49. Video Streaming FIFO Intel® FPGA IP 50. Video Timing Generator Intel® FPGA IP 51. Vignette Correction Intel® FPGA IP 52. Warp Intel® FPGA IP 53. White Balance Correction Intel® FPGA IP 54. White Balance Statistics Intel® FPGA IP 55. Design Security 56. Document Revision History for Video and Vision Processing Suite User Guide

52.3.1. Block Cache Tool

This tool estimates the minimum suggested size of the Warp IP engine’s block cache for the given transform and the number of processing engines. You can use the block cache tool at the design stage to help estimate required FPGA resources and evaluate warps specific to the customer application.

The block cache tool also detects if the configured transform exceeds maximum supported downscale ratio of 256:1, if mipmaps are on or 2:1 otherwise, in any part of the image.These values are the maximum supported compression values of the Warp IP. The block cache tool supports both single bounce and double bounce warp IP configurations.

The block cache tool provides a command line interface that allows you to specify the desired warp by using several available options such as rotation, mirroring, keystone, or by using a warp mesh file generated by the Warp SoC Design Example. The tool then estimates block cache usage for all supported block cache sizes. For each size option the tool prints the result in the following form:

Table 1066.  Tool Results
Result Description
Pass Requested warp is possible using this block cache size per processing engine
Pass, Block cache usage too high Requested warp might be possible. However the IP does not guarantee the output quality because of high block cache usage. The configuration requires further evaluation on the target system
Fail Requested warp is not possible using this block cache size. The estimation also fails if the warp exceeds a maximum supported local compression of 256:1 or 2:1 depending on the mipmap setting, in which case it fails for all block cache sizes

The block cache tool can visualize configured transform by warping a reference image and saving it as a bitmap (bmp) file on the disk.

The block cache tool is a command line application and included with the Quartus Prime Software.

Block Cache Tool Options

The block cache tool options:

vidip_bct.exe [option]…

Table 1067.  Block Cache Tool Options
Option Description Usage
-h Help

Print the tool usage information.

-iw -ih -ow -oh

Input width (pixels)

Input height (pixels)

Output width (pixels)

Output height (pixels)

Set input and output dimensions of the transformed image in pixels. Default image dimensions are 7680x4320 pixels.
-r

Rotation angle

Set rotation angle in degrees. Image is rotated around the center.
-mh

Mirror horizontally

Mirror image along horizontal axis.

-mv

Mirror vertically

Mirror image along vertical axis.

-ho

Horizontal offset (pixels)

Set horizontal offset in pixels.

-vo

Vertical offset (pixels)

Set vertical offset in pixels.

-hk

Horizontal keystone angle

Set horizontal keystone compensation angle in degrees.

-vk Vertical keystone angle

Set vertical keystone compensation angle in degrees.

-z Zoom

Set image zoom value: less than 1 to zoom out, greater than 1 to zoom in.

-pb

Radial distortion

Set radial distortion compensation value in the range: [-0.45..0.45].

-f

Mesh file name

Path to the warp mesh file generated by the Warp SoC Example application
-e

Number of warp engines.

Number of the warp processing engines. Supported values: 1 or 2 (default);

-db

Double bounce

Assume double bounce Warp IP configuration. By default, the tool assumes Single bounce configuration. Use this option to override default behavior.
-mm

Use mipmaps

Use mipmaps to allow warps with downscale ratios to a limit of 256:1

-s

Run warp simulator

Warp a reference image using provided settings and save result on disk. The output file name is warp_output.bmp.

Examples

This command:

vidip_bct.exe -iw 1920 -ih 1080 -ow 3840 -oh 2160 -r 15.0 -s

  • Sets the input resolution to full HD, output resolution to 4K
  • Performs a 15 degree rotation anticlockwise
  • Stores warped reference image on the disk.

The console output is:

intel_vvp_warp block cache tool v2.0
Input resolution:  1920x1080
Output resolution: 3840x2160
Warp engines:      4
Bounce:            Single
Mipmaps:           No
Generating warp data...

Cache size	Result	Warnings
256		   PASS
512		   PASS
1024		  PASS

The console output indicates the IP can perform the configured warp with all available block cache size options.

Figure 141. Warped reference image

This command:

vidip_bct.exe-iw 3840 -ih 2160 -ow 3840 -oh 2160 -e 2 -f flying_flag.owf -mm -s

  • Uses the warp mesh file generated by the Warp SoC Example Design, named flying_flag.owf
  • Sets input and output resolutions to 4K
  • Sets number of warp engines to 2
  • Enables mipmap usage
  • Stores warped reference image on the disk.

The console output is:

intel_vvp_warp block cache tool v2.0
Input resolution:  3840x2160
Output resolution: 3840x2160
Warp engines: 2
Bounce: Single

Generating warp data...
Cache size Result Warnings
256 PASS Block cache usage too high
512 PASS
1024 PASS

The console output indicates the IP can perform the warp using block cache sizes of 512 and 1024. With the block cache size of 256, the tool detects a high block cache usage. The IP cannot guarantee the output image quality and requires further evaluation on the actual hardware.

Figure 142. Warped reference image

This command:

vidip_bct.exe -z 0.45
  • Uses default input and output resolution of 8K
  • Scaled the image down by 0.45

The console output is

intel_vvp_warp block cache tool v2.0
Input resolution:  7680x4320
Output resolution: 7680x4320
Warp engines:      4
Bounce:            Single
Mipmaps:           No
Generating warp data...

Cache size	Result	Warnings
256		PASS	Compression too high

The console output indicates the transform exceeds the maximum compression of 2:1 and therefore the output image quality is not guaranteed.