Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 7/08/2024
Public
Document Table of Contents

FLOW_ENABLE_PARALLEL_MODULES

Allows you to run Assembler and the Timing Analyzer in parallel during compilation.

Type

Boolean

Device Support

  • This setting can be used in projects targeting any Intel FPGA device family.

Notes

This assignment is included in the Fitter report.

Syntax

set_global_assignment -name FLOW_ENABLE_PARALLEL_MODULES <value>

Default Value

On