Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 7/08/2024
Public
Document Table of Contents

UNFORCE_MERGE_PLL

Prevents the specified PLL to be merged with the master PLL. Use this option only for two compatible PLLs driven by the same clock source.

Type

Boolean

Device Support

  • Intel Agilex® 5
  • Intel Agilex® 7
  • Arria® 10
  • Cyclone® 10 GX
  • Stratix® 10

Notes

This assignment supports Fitter wildcards.

This assignment is included in the Fitter report.

Syntax

set_instance_assignment -name UNFORCE_MERGE_PLL -to <to> -entity <entity name> <value>