Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 7/08/2024
Public
Document Table of Contents

MATCH_PLL_COMPENSATION_CLOCK

Allows you to specify a PLL output clock feeding a clock network as a compensation target for a PLL in NORMAL or SOURCE_SYNCHRONOUS mode. This configures the PLL to match its feedback path to the target's clock network. This option is ignored if it is applied to anything other than a PLL output clock.

Type

Boolean

Device Support

  • Intel Agilex® 5
  • Intel Agilex® 7
  • Arria® 10
  • Cyclone® 10 GX
  • Stratix® 10

Notes

This assignment supports Fitter wildcards.

This assignment is included in the Fitter report.

Syntax

set_instance_assignment -name MATCH_PLL_COMPENSATION_CLOCK -to <to> -entity <entity name> <value>