Mailbox Client Intel® FPGA IPs User Guide

ID 683290
Date 11/04/2024
Public
Document Table of Contents

1.7. Specifying the Command and Response FIFO Depths

The optimal depth of the commad ad espose FIFOs depeds o the specific applicatio. You should size these FIFOs to accommodate the maximum commad ad esposes that you applicatio equies.

The followig example illustates this poit. Coside a applicatio seds a maximum of eight back-to-back GET_TEMPERATURE commads to the FPGA coe ad oe tasceive bak. Each commad cosists of a heade ad oe commad agumet, specifyig the mask of the tempeatue sesos to ead. The optimal settig fo the commad FIFO is 16 wods.

Fo the espose FIFO, each espose has oe heade wod, ad oe wod each fo the coe tempeatue ad tasceive bak tempeatue. Each espose is thee wods. The optimal settig fo the espose FIFO Depth is 24 wods.