DMA Accelerator Functional Unit User Guide: Intel® FPGA Programmable Acceleration Card D5005

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ID 683270
Date 8/03/2020
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. DMA AFU Description 3. Register Map and Address Spaces 4. Software Programming Model 5. Running DMA AFU Example 6. Compiling the DMA AFU Example 7. Simulating the AFU Example 8. Optimization for Improved DMA Performance 9. DMA Accelerator Functional Unit User Guide Archives 10. Document Revision History for the DMA Accelerator Functional Unit User Guide
1. About this Document x
1.1. Intended Audience 1.2. Conventions 1.3. Acronyms 1.4. Acceleration Glossary
2. DMA AFU Description x
2.1. Introduction 2.2. The DMA AFU Software Package 2.3. The DMA AFU Hardware Components
2.3. The DMA AFU Hardware Components x
2.3.1. DMA Test System 2.3.2. DMA BBB
3. Register Map and Address Spaces x
3.1. DMA AFU Register Map
3.1. DMA AFU Register Map x
3.1.1. DMA AFU Address Space 3.1.2. Device Feature Header Linked-List
1. About this Document
2. DMA AFU Description
3. Register Map and Address Spaces
4. Software Programming Model
5. Running DMA AFU Example
6. Compiling the DMA AFU Example
7. Simulating the AFU Example
8. Optimization for Improved DMA Performance
9. DMA Accelerator Functional Unit User Guide Archives
10. Document Revision History for the DMA Accelerator Functional Unit User Guide

2.2. The DMA AFU Software Package

The Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs package file (*.tar.gz), includes the DMA AFU example. This example provides a user space driver. The host application uses this driver such that the DMA moves data between host and FPGA memory. The hardware binaries, sources, and the user space driver are available in the following directory: $OPAE_PLATFORM_ROOT/hw/samples/dma_afu .

Before experimenting with the DMA AFU, you must install the Open Programmable Acceleration Engine (OPAE) software package. Refer to Installing the OPAE Software Package in the Intel® Acceleration Stack Quick Start Guide for Intel® FPGA Programmable Acceleration Card D5005 for installation instructions. This Quick Start Guide also includes basic information about the Open Programmable Acceleration Engine (OPAE) and configuring an AFU.

After installing the Open Programmable Acceleration Engine (OPAE) software package, a sample host application and the DMA AFU user space driver are available in the following directory: $OPAE_PLATFORM_ROOT/hw/samples/dma_afu/sw .

To run the sample host application, fpga_dma_test on your Intel® FPGA PAC D5005 hardware, refer to the steps in section Running the DMA AFU Example.

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