Intel® Quartus® Prime Pro Edition User Guide: Block-Based Design

Download PDF
ID 683247
Date 11/07/2023
Public
Document Table of Contents
Document Table of Contents x
1. Answers to Top FAQs 2. Block-Based Design Flows A. Intel® Quartus® Prime Pro Edition User Guides
2. Block-Based Design Flows x
2.1. Block-Based Design Terminology 2.2. Block-Based Design Overview 2.3. Design Methodologies Overview 2.4. Design Partitioning 2.5. Design Block Reuse Flows 2.6. Incremental Block-Based Compilation Flow 2.7. Setting-Up Team-Based Designs 2.8. Bottom-Up Design Considerations 2.9. Debugging Block-Based Designs with the Signal Tap Logic Analyzer 2.10. Block-Based Design Flows Revision History 2.11. Intel® Quartus® Prime Pro Edition User Guide: Block-Based Design Document Archive
2.2. Block-Based Design Overview x
2.2.1. Design Block Reuse Overview 2.2.2. Incremental Block-Based Compilation Overview
2.2.1. Design Block Reuse Overview x
2.2.1.1. Design Block Reuse Examples
2.3. Design Methodologies Overview x
2.3.1. Top-Down Design Methodology Overview 2.3.2. Bottom-Up Design Methodology Overview 2.3.3. Team-Based Design Methodology Overview
2.4. Design Partitioning x
2.4.1. Planning Partitions for Periphery IP, Clocks, and PLLs 2.4.2. Creating Design Partitions 2.4.3. Design Partition Guidelines
2.5. Design Block Reuse Flows x
2.5.1. Reusing Core Partitions 2.5.2. Reusing Root Partitions 2.5.3. Reserved Core Entity Re-Binding 2.5.4. Viewing Quartus Database File Information
2.5.1. Reusing Core Partitions x
2.5.1.1. Step 1: Developer: Create a Design Partition 2.5.1.2. Step 2: Developer: Compile and Export the Core Partition 2.5.1.3. Step 3: Developer: Create a Black Box File 2.5.1.4. Step 4: Consumer: Add the Core Partition and Compile
2.5.2. Reusing Root Partitions x
2.5.2.1. Step 1: Developer: Create a Reserved Core Partition 2.5.2.2. Step 2: Developer: Define a Logic Lock Region 2.5.2.3. Step 3: Developer: Compile and Export the Root Partition 2.5.2.4. Step 4: Consumer: Add the Root Partition and Compile
2.5.4. Viewing Quartus Database File Information x
2.5.4.1. QDB File Attribute Types
2.6. Incremental Block-Based Compilation Flow x
2.6.1. Design Abstraction
2.6.1. Design Abstraction x
2.6.1.1. Empty Partition Clock Source Preservation
2.7. Setting-Up Team-Based Designs x
2.7.1. Creating a Top-Level Project for a Team-Based Design
2.7.1. Creating a Top-Level Project for a Team-Based Design x
2.7.1.1. Prepare a Design Partition for Project Integration
1. Answers to Top FAQs
2. Block-Based Design Flows
A. Intel® Quartus® Prime Pro Edition User Guides

2.4.2. Creating Design Partitions

Follow these steps to create and modify design partitions:
  1. Click Processing > Start > Start Analysis & Elaboration.
  2. In the Project Navigator, right-click an instance in the Hierarchy tab, point to Design Partition, and click a design partition Type. A design partition icon appears next to each instance you assign.
    Figure 7. Creating a Design Partition from the Project Hierarchy

    This setting corresponds to the following assignment in the .qsf: 

    set_instance_assignment -name PARTITION <name> \
     -to <partition hierarchical path>
  3. To view and edit all design partitions in the project, click Assignments > Design Partitions Window.
    Figure 8. Design Partitions Window
  4. Specify the properties of the design partition in the Design Partitions Window. The following settings are available:
    Table 2.  Design Partition Settings
    Option Description
    Partition Name Specifies the partition name. Each partition name must be unique and consist of only alphanumeric characters. The Intel® Quartus® Prime software automatically creates a top-level (|) "root_partition" for each project revision.
    Hierarchy Path Specifies the hierarchy path of the entity instance that you assign to the partition. You specify this value in the Create New Partition dialog box. The root partition hierarchy path is |.
    Type Double-click to specify one of the following partition types that control how the Compiler processes and implements the partition:
    • Default—Identifies a standard partition. The Compiler processes the partition using the associated design source files.
    • Reconfigurable—Identifies a reconfigurable partition in a partial reconfiguration flow. Specify the Reconfigurable type to preserve synthesis results, while allowing refit of the partition in the PR flow.
    • Reserved Core—Identifies a partition in a block-based design flow that is reserved for core development by a Consumer reusing the device periphery.
    Empty Specifies an empty partition that the Compiler skips. This setting is incompatible with the Reserved Core and Partition Database File settings for the same partition.
    Partition Database File Specifies a Partition Database File (.qdb) that the Compiler uses during compilation of the partition. You export the .qdb for the stage of compilation that you want to reuse (synthesized or final). Assign the .qdb to a partition to reuse those results in another context.
    Entity Re-binding
    • PR Flow—specifies the entity that replaces the default persona in each implementation revision.
    • Root Partition Reuse Flow —specifies the entity that replaces the reserved core logic in the consumer project.
    Color Specifies the color-coding of the partition in the Chip Planner and Design Partition Planner displays.
    Post Synthesis Export File Automatically exports post-synthesis compilation results for the partition to the specified .qdb file each time Analysis & Synthesis runs. You can automatically export any design partition that does not have a preserved parent partition, including the root_partition.
    Post Final Export File Automatically exports post-final compilation results for the partition to the specified .qdb file each time the final stage of the Fitter runs. You can automatically export any design partition that does not have a preserved parent partition, including the root_partition.

Following compilation, you can view details about design partition implementation in the Compilation View tab of the Design Partitions Window. The synthesis and Fitter reports provide additional information about .qdb file assignments.

Figure 9. Design Partition Window Compilation View Tab
Note: You can only preserve paths inside a partition, and cannot preserve the paths crossing from one partition to another. Although you cannot merge partitions together, you can create a RTL wrapper to wrap modules that you want to group into a partition, and then assign a design partition to the RTL wrapper.
Level Two Title