O-RAN Intel® FPGA IP User Guide

Download PDF
ID 683238
Date 11/27/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
Document Table of Contents x
1. About the O-RAN Intel® FPGA IP 2. Getting Started with the O-RAN Intel® FPGA IP 3. O-RAN IP Functional Description 4. O-RAN IP Registers 5. O-RAN Intel FPGA IP User Guide Archive 6. Document Revision History for the O-RAN Intel® FPGA IP User Guide
1. About the O-RAN Intel® FPGA IP x
1.1. O-RAN Intel® FPGA IP Features 1.2. O-RAN Intel® FPGA IP Device Family Support 1.3. Release Information for the O-RAN Intel® FPGA IP 1.4. O-RAN Intel® FPGA IP Performance and Resource Utilization
2. Getting Started with the O-RAN Intel® FPGA IP x
2.1. Obtaining, Installing, and Licensing the O-RAN IP 2.2. Parameterizing the O-RAN IP 2.3. Generated IP File Structure
2.2. Parameterizing the O-RAN IP x
2.2.1. O-RAN IP Parameters
3. O-RAN IP Functional Description x
3.1. O-RAN IP Signals 3.2. O-RAN Intel® FPGA IP Error Handling 3.3. O-RAN Reset Transactions 3.4. O-RAN IP Streaming Mode 3.5. O-RAN IP Performance Counters 3.6. O-RAN IP Transmission and Reception Window Threshold 3.7. O-RAN IP Fragmentation 3.8. O-RAN IP U-Plane Packet Size
3.6. O-RAN IP Transmission and Reception Window Threshold x
3.6.1. O-RAN IP Examples for Transmission and Reception Window Thresholds
1. About the O-RAN Intel® FPGA IP
2. Getting Started with the O-RAN Intel® FPGA IP
3. O-RAN IP Functional Description
4. O-RAN IP Registers
5. O-RAN Intel FPGA IP User Guide Archive
6. Document Revision History for the O-RAN Intel® FPGA IP User Guide

3.2. O-RAN Intel® FPGA IP Error Handling

Table 19.  Error Handling
Events Hardware Logging Mitigations
Invalid transmission C-plane request section type IP creates log in transmission error register. IP drops request.
Transmission window check IP creates log in transmission error register and interrupt signal asserted. IP drops request.
Reception window check IP creates log in receiver error register and asserts interrupt signal. IP drops request.
Common or section FIFO overflow in section 0, 1, or, 3 mapper IP creates log in transmission error register. None. The IP expects a system reset to flush the error.
Invalid common header (invalid section type, number of sections fields) for C-Plane data IP creates log in receiver error register and asserts interrupt signal. IP flags irq for C-plane number of sections greater than 23 (decimal). IP sends request to user application interface with Avalon streaming error indication.
Invalid section header (other than invalid ef field) for C- or U-plane data. Check extType < MAX_EXTTYPE IP creates log in receiver error register and asserts interrupt signal. IP sends request to user application interface with Avalon Streaming error indication.
Invalid PRB fields (invalid uCompHdr, i/q sample) for U-plane data.

Static compression mode: ignore check

Dynamic compression mode:

  • udCompMeth = 0000/0001/0011/
  • udIqWidth = 1000 to 1111
IP creates log in receiver error register and asserts interrupt signal. IP sends error request to user.
Incoming Avalon Streaming error packet IP asserts log in receiver error register and interrupt signal. Depends on the error events. IP sends request to user application interface with Avalon Streaming error indication
Invalid Avalon Streaming empty byte in transport receive interface (total packet size is incorrect by 1-7B) None

The IP always takes in 4/8B of packet payload from receiving Avalon Streaming transport interface. The IP ignores empty signals during processing on C/U plane data.

The IP flags no error for this scenario.

Invalid section header (incomplete section header) for C-Plane data

Log in receiver error register and interrupt signal asserted. Request drop.
Level Two Title