2.1.1. O-RAN IP Design Example Parameters
| Parameter | Values | Description |
|---|---|---|
| Generate Example Design for | Simulation | Select to generate the simulation files. For example for F-tile designs that support simulation only. |
| Synthesis | Select to generate the synthesis files | |
| Synthesis & Simulation | Select to generate the synthesis and simulation files. | |
| Generate File Format | Verilog VHDL | Select either Verilog HDL or VHDL as the format for generated RTL files simulation and synthesis. Some submodules are generated in mixed (both Verilog HDL and VHDL) formats. |
| Select board | Agilex SI Development Kit | Select to allow you to test the design example on the selected Intel development kit. The wizard automatically selects the target device to match the device on the selected Intel development kit. Select AGFB014R24A2E3V for an Agilex™ 7 E-tile device. If your board revision has a different speed grade of these devices above, you can correct it. |
| Agilex 5 FPGA E-Series 065B Premium Development Kit | Select to allow you to test the design example on a selected Intel development kit. The wizard automatically selects the target device to match the device on the selected development kit. Select A5ED065BB32AE6SR0 for an Agilex 5 device. If your board revision has a different speed grade of these devices above, you can correct it. |
|
| Arria 10 GX Transceiver SI Development Kit. | Select to allow you to test the design example on the selected Intel development kit. The wizard automatically selects the target device to match the device on the selected Intel development kit. Select 10AX115S2F45I1SG for an Arria® 10 device. If your board revision has a different speed grade of these devices above, you can correct it. |
|
| Stratix 10 GX FPGA Development Kit (Production H-tile) |
Select to allow you to test the design example on the selected Intel development kit. The wizard automatically selects the target device to match the device on the selected Intel development kit. Select 1SX280HU2F50E2VG for Stratix® 10 H-Tile and 1ST280EY2F55E2VG for Stratix® 10 E-Tile. If your board revision has a different speed grade of these devices above, you can correct it. | |
| Stratix 10 TX Signal Integrity Development Kit (Production E-tile) | ||
| No Development Kit | Select to exclude development kit hardware for the design example. For example for F-tile designs that support simulation only. |
|
| Number of channels | 1 to 4 | Select the number of channels to generate in the design example. |