O-RAN Intel® FPGA IP Design Example User Guide

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ID 683218
Date 11/18/2024
Public
Document Table of Contents
Document Table of Contents x
1. About the O-RAN Intel® FPGA IP Design Example 2. Getting Started with the O-RAN Intel® FPGA IP Design Example 3. O-RAN Intel® FPGA IP Design Example Functional Description 4. O-RAN IP Design Example User Guide Archives 5. Document Revision History for the O-RAN Intel® FPGA IP Design Example User Guide
2. Getting Started with the O-RAN Intel® FPGA IP Design Example x
2.1. Generating the O-RAN IP Design Example 2.2. Simulating the O-RAN IP Design Example 2.3. Operating the O-RAN IP Design Example
2.1. Generating the O-RAN IP Design Example x
2.1.1. O-RAN IP Design Example Parameters
2.2. Simulating the O-RAN IP Design Example x
2.2.1. Simulating the O-RAN Design Example for Agilex™ 7 F-Tile Devices 2.2.2. Enabling Dynamic Reconfiguation to the Ethernet IP 2.2.3. O-RAN IP Design Example Testbench
2.3. Operating the O-RAN IP Design Example x
2.3.1. Generating and Downloading the Linking Format .elf Programming File
1. About the O-RAN Intel® FPGA IP Design Example
2. Getting Started with the O-RAN Intel® FPGA IP Design Example
3. O-RAN Intel® FPGA IP Design Example Functional Description
4. O-RAN IP Design Example User Guide Archives
5. Document Revision History for the O-RAN Intel® FPGA IP Design Example User Guide

2.3.1. Generating and Downloading the Linking Format .elf Programming File

This task shows how to generate and build a Nios V processor software project. For a streamlined flow, ensure you create the same directory tree in your design project as in this task.
  1. In your design project folder, create a directory called software.
  2. In the software directory, create two directories called app and bsp.
  3. Copy all files in <design_example_dir>/synthesis/ed_fw to <design_example_dir>/synthesis/quartus/software/app.
    The design files are: 
    c2_reconfig.h
c3_funtion.c
c3_recongifg.c
c3_reconfig.h
flow.c
flow.h
main.c
  4. Generate the BSP:
    1. Launch the Nios V Command Shell
    2. Go to <design_example_dir>/synthesis/quartus/software directory.
    3. Run the following command. 
      niosv-bsp -c --quartus-project=../ecpri_ed.qpf --
qsys=../../ip_components/nios_system.qsys --type=hal ./bsp/settings.bsp
  5. Generate the application project: 
    niosv-app --bsp-dir=./bsp --app-dir=./app --srcs=./app/ --elf-name=nios_system.elf
  6. Build the application project: 
    cmake -G "Unix Makefiles" -S ./app -B ./app/build make -C ./app/build
    The nios_system.elf file is generated in the <design_example_dir>/synthesis/quartus/software/app/build directory.
  7. Program the Nios V processor:
    1. Go to <design_example_dir>/synthesis/quartus/software/app/build
    2. Type the following command in the Nios V Command Shell.
      • For Stratix 10 devices:
        niosv-download -g -r nios_system.elf -c 1 -d 1 -i 0
      • For Agilex 7 devices: 
        niosv-download -g -r nios_system.elf -c 1 -d 0 -i 0
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