SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes

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ID 683202
Date 6/12/2020
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SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes
SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes x
New Features and Enhancements Tool Versions Known Issues SoC FPGA Embedded Development Suite Archives Revision History for SoC FPGA Embedded Development Suite (EDS) Release Notes
SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes

SoC FPGA Embedded Development Suite (EDS) Standard Version 20.1 Release Notes

Updated for:
Intel® Quartus® Prime Design Suite 20.1 Standard

This document provides up-to-date information about the SoC EDS Standard Edition version 20.1 release for the of the SoC FPGA Embedded Development Suite (EDS) software.

The SoC EDS Standard Edition targets the Cyclone® V, Arria® V, and Intel® Arria® 10 devices and must be used only with FPGA projects created in Intel® Quartus® Prime Standard Edition.

For more information, refer to the SoC FPGA Embedded Development Suite User Guide.

For earlier versions of these release notes, refer to the SoC FPGA Embedded Development Suite Archives section.


Section Content
New Features and Enhancements
Tool Versions
Known Issues
SoC FPGA Embedded Development Suite Archives
Revision History for SoC FPGA Embedded Development Suite (EDS) Release Notes

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