Visible to Intel only — GUID: ewa1403015792701
Ixiasoft
Visible to Intel only — GUID: ewa1403015792701
Ixiasoft
2.2.6. interfaces
<interfaces> <interface name="board" port="kernel_cra" type="host" width="64" misc="0"/> <interface name="board" port="kernel_irq" type="irq" width="1"/> <interface name="board" port="acl_internal_snoop" type="streamsource" enable="SNOOPENABLE" width="31" clock="board.kernel_clk"/> <kernel_clk_reset clk="board.kernel_clk" clk2x="board.kernel_clk2x" reset="board.kernel_reset"/> </interfaces>
In addition to the host, irq, and streamsource interfaces, if your design includes a separate Platform Designer subsystem containing the board logic, the kernel clock and reset interfaces exported from it are also part of the interfaces element. Specify these interfaces with the kernel_clk_reset attribute and its corresponding parameters.
Attribute | Description |
---|---|
clk | The Platform Designer name for the kernel clock interface. The kernel_clk output from the OpenCL Kernel Clock Generator component drives this interface. |
clk2x | The Platform Designer name for the kernel clock interface. The kernel_clk2x output from the OpenCL Kernel Clock Generator component drives this interface. |
reset | The Platform Designer connection for the kernel reset. The kernel_reset output from the OpenCL Kernel Interface component drives this interface. |