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1.1. Intel FPGA Simulation Essential Elements
1.2. Overview of Simulation Tool Flow
1.3. Simulation Tool Flow
1.4. Supported Simulation Types
1.5. Supported Simulation Flows
1.6. Supported Hardware Description Languages
1.7. Supported Simulators
1.8. Using NativeLink Simulation ( Intel® Quartus® Prime Standard Edition)
1.9. Intel FPGA Simulation Basics Revision History
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1.3. Simulation Tool Flow
The simulation tool flow begins with the compilation stage that compiles files into logical libraries using simulator specific compilation commands.
The next stage is elaboration, where you run the elaboration command to generate an executable simulation model. In the final stage, you run the executable simulation model to run the simulation.
The following topics describe these simulation tool flow concepts in more detail: