Visible to Intel only — GUID: GUID-5BD0D312-47F0-41B9-B6FA-24BCF5FDA22D
Abs
AbsBackward
Add
AvgPool
AvgPoolBackward
BatchNormForwardTraining
BatchNormInference
BatchNormTrainingBackward
BiasAdd
BiasAddBackward
Clamp
ClampBackward
Concat
Convolution
ConvolutionBackwardData
ConvolutionBackwardWeights
ConvTranspose
ConvTransposeBackwardData
ConvTransposeBackwardWeights
Dequantize
Divide
DynamicDequantize
DynamicQuantize
Elu
EluBackward
End
Exp
GELU
GELUBackward
HardSigmoid
HardSigmoidBackward
HardSwish
HardSwishBackward
Interpolate
InterpolateBackward
LayerNorm
LayerNormBackward
LeakyReLU
Log
LogSoftmax
LogSoftmaxBackward
MatMul
Maximum
MaxPool
MaxPoolBackward
Minimum
Mish
MishBackward
Multiply
Pow
PReLU
PReLUBackward
Quantize
Reciprocal
ReduceL1
ReduceL2
ReduceMax
ReduceMean
ReduceMin
ReduceProd
ReduceSum
ReLU
ReLUBackward
Reorder
Round
Select
Sigmoid
SigmoidBackward
SoftMax
SoftMaxBackward
SoftPlus
SoftPlusBackward
Sqrt
SqrtBackward
Square
SquaredDifference
StaticReshape
StaticTranspose
Subtract
Tanh
TanhBackward
TypeCast
Wildcard
enum dnnl_alg_kind_t
enum dnnl_normalization_flags_t
enum dnnl_primitive_kind_t
enum dnnl_prop_kind_t
enum dnnl_query_t
enum dnnl::normalization_flags
enum dnnl::query
struct dnnl_exec_arg_t
struct dnnl_primitive
struct dnnl_primitive_desc
struct dnnl::primitive
struct dnnl::primitive_desc
struct dnnl::primitive_desc_base
enum dnnl_rnn_direction_t
enum dnnl_rnn_flags_t
enum dnnl::rnn_direction
enum dnnl::rnn_flags
struct dnnl::augru_backward
struct dnnl::augru_forward
struct dnnl::gru_backward
struct dnnl::gru_forward
struct dnnl::lbr_augru_backward
struct dnnl::lbr_augru_forward
struct dnnl::lbr_gru_backward
struct dnnl::lbr_gru_forward
struct dnnl::lstm_backward
struct dnnl::lstm_forward
struct dnnl::rnn_primitive_desc_base
struct dnnl::vanilla_rnn_backward
struct dnnl::vanilla_rnn_forward
Visible to Intel only — GUID: GUID-5BD0D312-47F0-41B9-B6FA-24BCF5FDA22D
pooling cpp
Annotated version: Pooling Primitive Example
Annotated version: Pooling Primitive Example
/*******************************************************************************
* Copyright 2020-2022 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
#include <algorithm>
#include <cmath>
#include <iostream>
#include <string>
#include <vector>
#include "example_utils.hpp"
#include "oneapi/dnnl/dnnl.hpp"
using namespace dnnl;
using tag = memory::format_tag;
using dt = memory::data_type;
void pooling_example(dnnl::engine::kind engine_kind) {
// Create execution dnnl::engine.
dnnl::engine engine(engine_kind, 0);
// Create dnnl::stream.
dnnl::stream engine_stream(engine);
// Tensor dimensions.
const memory::dim N = 3, // batch size
IC = 3, // input channels
IH = 27, // input tensor height
IW = 27, // input tensor width
KH = 11, // kernel height
KW = 11, // kernel width
PH_L = 0, // height padding: left
PH_R = 0, // height padding: right
PW_L = 0, // width padding: left
PW_R = 0, // width padding: right
SH = 4, // height-wise stride
SW = 4, // width-wise stride
DH = 1, // height-wise dilation
DW = 1; // width-wise dilation
const memory::dim OH = (IH - ((KH - 1) * DH + KH) + PH_L + PH_R) / SH + 1;
const memory::dim OW = (IW - ((KW - 1) * DW + KW) + PW_L + PW_R) / SW + 1;
// Source (src) and destination (dst) tensors dimensions.
memory::dims src_dims = {N, IC, IH, IW};
memory::dims dst_dims = {N, IC, OH, OW};
// Kernel dimensions.
memory::dims kernel_dims = {KH, KW};
// Strides, padding dimensions.
memory::dims strides_dims = {SH, SW};
memory::dims padding_dims_l = {PH_L, PW_L};
memory::dims padding_dims_r = {PH_R, PW_R};
memory::dims dilation = {DH, DW};
// Allocate buffers.
std::vector<float> src_data(product(src_dims));
std::vector<float> dst_data(product(dst_dims));
std::generate(src_data.begin(), src_data.end(), []() {
static int i = 0;
return std::cos(i++ / 10.f);
});
// Create memory descriptors and memory objects for src and dst.
auto src_md = memory::desc(src_dims, dt::f32, tag::nchw);
auto src_mem = memory(src_md, engine);
auto dst_md = memory::desc(dst_dims, dt::f32, tag::nchw);
auto dst_mem = memory(dst_md, engine);
// Write data to memory object's handle.
write_to_dnnl_memory(src_data.data(), src_mem);
// Create primitive descriptor.
auto pooling_pd = pooling_forward::primitive_desc(engine,
prop_kind::forward_training, algorithm::pooling_max, src_md, dst_md,
strides_dims, kernel_dims, dilation, padding_dims_l,
padding_dims_r);
// Create workspace memory objects using memory descriptor created by the
// primitive descriptor.
// NOTE: Here, the workspace is required to save the indices where maximum
// was found, and is used in backward pooling to perform upsampling.
auto workspace_mem = memory(pooling_pd.workspace_desc(), engine);
// Create the primitive.
auto pooling_prim = pooling_forward(pooling_pd);
// Primitive arguments. Set up in-place execution by assigning src as DST.
std::unordered_map<int, memory> pooling_args;
pooling_args.insert({DNNL_ARG_SRC, src_mem});
pooling_args.insert({DNNL_ARG_DST, dst_mem});
pooling_args.insert({DNNL_ARG_WORKSPACE, workspace_mem});
// Primitive execution: pooling.
pooling_prim.execute(engine_stream, pooling_args);
// Wait for the computation to finalize.
engine_stream.wait();
// Read data from memory object's handle.
read_from_dnnl_memory(dst_data.data(), dst_mem);
}
int main(int argc, char **argv) {
return handle_example_errors(
pooling_example, parse_engine_kind(argc, argv));
}