Highlights of Programming With SYCL

• In SYCL, the FPGA programming image file (aocx) is hidden inside the executable. Running this executable runs the host code, programs the board with the aocx, and runs the kernels. However, you must learn new methods of predicting and controlling which kernels are contained in each aocx, and when programming of the board occurs. See FPGA BSPs and Boards in the Intel® oneAPI Programming Guide.
• Since a SYCL program can be single-sourced, you can place the host and the device kernel code in the same .cpp file. Therefore, any change to that .cpp file triggers a recompile of the entire file, including the kernel code. The compile-time for kernel code on FPGA can be many hours, so you must learn new strategies to avoid recompiling the kernel code if you made changes only in the host code. See Fast Recompile for FPGA in the Intel® oneAPI Programming Guide for more information about these strategies.
• Like with OpenCL™, you can emulate your SYCL program on a CPU to verify its functional correctness quickly. A SYCL program chooses which device to run on using a device_selector. The SYCL program can either choose the Intel® FPGA Emulation Platform for OpenCL™ software (also referred as the emulator or the FPGA emulator) or the FPGA hardware device. For convenience, Intel® recommends using a macro to help switch between emulation and hardware devices. See Device Selectors for FPGA in the Intel® oneAPI Programming Guide for more information.
• The SYCL runtime is a higher-level abstraction than the OpenCL™ runtime. For example, it can automatically handle data transfer between host and kernels. This can significantly simplify your code. However, for high performance, a more manual approach to data transfer can sometimes be beneficial. See Memory Accesses and its subtopics in the FPGA Optimization Guide for Intel® oneAPI Toolkits for more information about how you can create buffers in SYCL and how you can use Unified Shared Memory (USM) allocations for manually controlling data transfers.
• You submit kernels to a queue in OpenCL™, but in SYCL, the queue is out-of-order by default. Recall that in OpenCL™, a queue is in-order by default. If you want in-order queue behavior, create the queue with the sycl::property::queue::in_order property.
• Like OpenCL™, SYCL allows you to have either single-task kernels or NDRange kernels. As in OpenCL™, Intel® recommends using single-task kernels for FPGA targets. See Single Work-item Kernels section in the FPGA Optimization Guide for Intel® oneAPI Toolkits and sycl::parallel_for.