Visible to Intel only — GUID: GUID-5DFEF389-349B-4678-9816-57ADE8F348C5
Visible to Intel only — GUID: GUID-5DFEF389-349B-4678-9816-57ADE8F348C5
Process Pinning
Use this feature to pin a particular MPI process to a corresponding set of CPUs within a node and avoid undesired process migration. This feature is available on operating systems that provide the necessary kernel interfaces.
Processor Identification
The following schemes are used to identify logical processors in a system:
- System-defined logical enumeration
- Topological enumeration based on three-level hierarchical identification through triplets (package/socket, core, thread)
The number of a logical CPU is defined as the corresponding position of this CPU bit in the kernel affinity bit-mask. Use the cpuinfo utility, provided with your Intel(R) MPI Library installation or the cat /proc/cpuinfo command to find out the logical CPU numbers.
The three-level hierarchical identification uses triplets that provide information about processor location and their order. The triplets are hierarchically ordered (package, core, and thread).
See the example for one possible processor numbering where there are two sockets, four cores (two cores per socket), and eight logical processors (two processors per core).
0 | 4 | 1 | 5 | 2 | 6 | 3 | 7 |
Socket | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
Core | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
Thread | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
Use the cpuinfo utility to identify the correspondence between the logical and topological enumerations. See Processor Information Utility for more details.
To calculate the pinning mask, use the Pinning Simulator for Intel MPI Library.
Default Settings
If you do not specify values for any process pinning environment variables, the default settings below are used. For details about these settings, see Environment Variables and Interoperability with OpenMP API.
- I_MPI_HYDRA_TOPOLIB=ipl2
- I_MPI_PIN=on
- I_MPI_PIN_RESPECT_CPUSET=on
- I_MPI_PIN_CELL=unit
- I_MPI_PIN_ORDER=bunch
When the number of ranks per package can be evenly distributed to NUMAs within a package, the NUMA aware bunch algorithm is enabled.
Pinning on Hybrid Architectures
For Intel(R) CPUs with performance and efficient cores, the default is I_MPI_PIN=0, and each process inherits a pinning mask from the operating system. In such cases, pinning environment variables have no effect.
To use pinning environment variables, set I_MPI_PIN=1. In this case, the pinning library runs the default algorithm treating all cores the same. As a result, some MPI ranks could get more efficiency core than the others that may impact performance.
To remove efficient or performance cores from pinning, use I_MPI_PIN_PROCESSOR_EXCLUDE_LIST.